NFET Timer Circuit Using Electromigration for IC Age Detection
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Solution Overview
Problem
The challenge in integrated circuit (IC) manufacturing is the increasing issue of electromigration-induced failures due to aggressive scaling of interconnect wires, which conventional temperature measurement methods fail to effectively monitor, especially in high-activity circuits, leading to reliability degradation and potential counterfeit ICs when old chips are recycled and sold as new.
Innovation Solution
A timer circuit is introduced that includes n-type field effect transistors (NFETs) powered by a current source, electromigration detection elements connected to each NFET, and a read-out circuit to meter the usage of NFETs, utilizing the electromigration effect to determine the lifespan of ICs by associating each FET with an electromigration element, thereby preventing counterfeit ICs by detecting the 'age' of the chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional temperature measurement methods are used to monitor IC circuits, then temperature monitoring is provided, but electromigration-induced failures cannot be effectively detected and chip lifespan cannot be determined
Solution Approach 1:
The patent converts the harmful electromigration effect (which causes interconnect wire failure) into a beneficial timing mechanism. By designing electromigration detection elements with controlled electromigration, the patent creates a timer that degrades predictably over time, allowing the harmful physical effect to be used as a useful lifetime indicator for counterfeit detection
Solution Approach 2:
The patent introduces electromigration detection elements as intermediary components between the NFETs and the read-out circuit. These detection elements act as mediators that translate the invisible electromigration process into measurable electrical signals (current or voltage changes) that indicate chip age and authenticity
2Productivity
If aggressive scaling of interconnect wires is implemented to improve IC density, then manufacturing capability is enhanced, but electromigration-induced failures increase
Solution Approach 1:
The patent implements preliminary action by incorporating electromigration detection elements during the manufacturing process itself, rather than attempting to detect electromigration effects after failure occurs. The timer circuit is pre-configured with detection elements that begin tracking electromigration accumulation from the moment the chip is activated, enabling early warning before actual interconnect failure
3Measurement precision
If timer circuits with electromigration detection elements are added to monitor NFET usage, then chip lifespan and authenticity can be determined, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the timer functionality across multiple independent electromigration detection elements, each associated with a specific NFET. This segmentation allows the system to measure different time intervals or usage thresholds independently, then combine these measurements to determine overall chip age and authenticity, making the complex measurement task manageable through modular components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively monitors the electromigration in ICs, determining their lifespan and preventing counterfeiting by using electromigration detection elements that indicate the lifetime of each NFET, allowing for accurate assessment of chip reliability and authenticity.
Implementation Method 1
EM is the transport of material caused by the gradual movement of the ions in a conductor due to the momentum transfer between conducting electrons and diffusing metal atoms. For example, EM is an electronic-current-induced diffusion due to an electron wind force on metal atoms in the interconnect wires and other conductors in integrated circuit products.
Data Source
AI summary
A timer circuit includes a plurality of n-type field effect transistors (NFETs) powered by a current source, a plurality of electromigration detection elements each electrically connected to a respective NFET of the plurality of NFETs, and a read-out circuit electrically connected to the plurality of electromigration detection elements to meter usage of each of the NFETs.