Ni3Si Gate Electrode Strain in Nanosheet Transistors

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Solution Overview

Problem

It is challenging to apply external strain to suspended semiconductor channel material nanosheets in gate-all-around nanosheet structures after the sacrificial semiconductor material is removed, which hinders performance enhancement of nanosheet transistors.

Innovation Solution

The introduction of a nickel monosilicide gate electrode layer in pFET structures and a Ni3Si gate electrode layer in nFET structures, where the Ni3Si layer introduces strain into the suspended semiconductor channel material nanosheets, while the nickel monosilicide layer does not, allowing for differential strain application between pFET and nFET devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If sacrificial semiconductor material nanosheets are removed to form suspended channel nanosheets, then gate-all-around structure is achieved with increased effective width, but channel strain is relaxed and cannot be applied afterwards

Engineering Contradiction:

Improveeffective width per active footprintVSAvoidchannel strain

Core Design Contradiction:

Area of moving objectVSReliability

Solution Approach 1:

Strain is introduced into the channel nanosheets before the sacrificial material is removed and the nanosheets are suspended. The strain is embedded in the structure during fabrication, allowing it to be preserved after the sacrificial material is removed and gate-all-around formation is completed

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

Different strain conditions are applied to different regions: nFET regions receive strained silicon channel material while pFET regions receive unstrained silicon channel material. This allows selective strain application to optimize performance for each device type while maintaining the gate-all-around structure

Inventive Principle:

Principle #3Local quality

2Ease of manufacture

If uniform gate electrode material is used for both pFET and nFET, then manufacturing process is simplified, but differential strain application is not possible

Engineering Contradiction:

Improvegate electrode fabricationVSAvoiddifferential strain application

Core Design Contradiction:

Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

Different gate electrode materials are used in different regions: nickel monosilicide for pFET gates and Ni3Si for nFET gates. This allows each device type to have optimized strain conditions while using a unified gate-all-around nanosheet fabrication process

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The gate electrode material composition is changed based on device type requirements. By controlling the nickel layer thickness and silicidation conditions, different nickel silicide phases (NiSi vs Ni3Si) are formed to provide different strain characteristics for pFET and nFET devices

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables strain introduction into nFET nanosheets, enhancing their performance without affecting pFET performance, thereby improving the effectiveness of gate-all-around nanosheet transistors.

Implementation Method 1

The nFET gate-all-around nanosheet structure contains a Ni3Si gate electrode layer that introduces strain into each suspended semiconductor channel material nanosheet of the second vertical stack of suspended semiconductor channel material nanosheets

Methodology Applied

Scientific EffectStrain: Deformation

Implementation Method 2

The pFET gate-all-around nanosheet structure contains a nickel monosilicide gate electrode layer that does not introduce strain into each suspended semiconductor channel material nanosheet of the first vertical stack of suspended semiconductor channel material nanosheets

Methodology Applied

Scientific EffectStrain relaxation: Stress Relaxation

Data Source

PatentUS10332809B1Method and structure to introduce strain in stack nanosheet field effect transistor

Publication Date: 2019.06.25 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A semiconductor structure is provided that includes a pFET gate-all-around nanosheet structure and an nFET gate-all-around nanosheet structure integrated together on the same substrate. The pFET gate-all-around nanosheet structure contains a nickel monosilicide gate electrode layer that does not introduce strain into each suspended semiconductor channel material nanosheet of a first vertical stack of suspended semiconductor channel material nanosheets. The nFET gate-all-around nanosheet structure contains a Ni3Si gate electrode layer that introduces strain into each suspended semiconductor channel material nanosheet of a second vertical stack of suspended semiconductor channel material nanosheets.