Nitride Ferroelectric Memory Capacitors for Scaled FRAM Arrays
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Solution Overview
Problem
Conventional integrated circuit fabrication processes face challenges in scaling features to the 10 nanometer node or sub-10 nanometer node range, particularly due to variability in multi-gate transistor fabrication, leading to issues such as low density in one-transistor-one-capacitor dynamic random access memory (1T-1C DRAM) devices and read disturbances in ferroelectric random access memory (FeRAM) architectures.
Innovation Solution
The implementation of nitride-based ferroelectric materials, such as aluminum scandium nitride (AlScN), in memory devices to enhance ferroelectric RAM (FRAM) structures, providing improved wakeup and stable remnant polarization, reducing read disturbances and increasing density by using superlattice configurations and specific material compositions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used for scaling, then manufacturing simplicity is maintained, but manufacturing precision deteriorates at 10 nanometer node or sub-10 nanometer node range
Solution Approach 1:
The patent introduces new material parameters (nitride-based ferroelectric materials with specific compositions like AlScN, AlLiNbO, etc.) and process parameters (molecular beam epitaxy, pulsed laser deposition) to achieve the required manufacturing precision at 10nm node, transforming the fabrication approach from conventional to advanced material-based processes
Solution Approach 2:
The patent employs composite material structures including nitride-based ferroelectric layers combined with specific electrode materials (Pt, IrO2, RuO2) and dielectric layers, creating multi-layer composite structures that enable precise feature fabrication at sub-10nm nodes while maintaining process control
2Quantity of substance
If multi-gate transistor scaling is continued, then device density is improved, but variability in fabrication increases
Solution Approach 1:
The patent applies local quality by using nitride-based ferroelectric materials with tailored compositions and properties in specific regions of the memory device, enabling precise control of electrical characteristics and reducing variability in multi-gate transistor fabrication at scaled dimensions
Solution Approach 2:
The patent replaces conventional ferroelectric materials with nitride-based ferroelectric materials that offer superior scalability and reduced variability, substituting the mechanical/fabrication constraints with material-property-based solutions that enable consistent performance at higher densities
3Device complexity
If conventional ferroelectric RAM architectures are used, then structure simplicity is maintained, but read disturbances occur
Solution Approach 1:
The patent changes the material parameters by using nitride-based ferroelectric materials with enhanced polarization stability and coercive field characteristics, which reduce read disturbances while maintaining relatively simple FRAM structures through material optimization rather than structural complexity
Solution Approach 2:
The patent employs nitride-based ferroelectric materials that provide improved performance characteristics (reduced read disturbances) without requiring complex memory architectures, achieving reliable operation through material selection rather than structurally complex designs
4Quantity of substance
If feature scaling is pursued to increase density, then capacity is improved, but performance optimization becomes increasingly difficult
Solution Approach 1:
The patent optimizes device performance at scaled dimensions by changing material parameters - using nitride-based ferroelectric materials with specific compositions (AlScN, AlLiNbO, etc.) and controlled thicknesses that maintain excellent polarization characteristics and low variability even at 10nm node and below, enabling high capacity with optimized performance
Solution Approach 2:
The patent uses composite material structures combining nitride-based ferroelectric layers with specifically selected electrode and dielectric materials to achieve both high density and optimized performance, where the composite structure enables tailored electrical characteristics that maintain reliability at scaled dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of nitride-based ferroelectric materials in FRAM structures addresses scaling challenges, achieving near-zero wakeup and stable remnant polarization, thereby enhancing memory array performance and reducing read disturbances, and enabling higher integration densities in future technology nodes.
Implementation Method 1
a nitride-based ferroelectric material layer (112) between the first plateline (102) and the node (110)
Data Source
Figure 1A
Figure 1B
Figure 2
AI summary
Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to memory devices (100) comprising a plateline (102), a node (110) and a capacitor (120) coupled to the plateline, wherein the capacitor comprises a nitride-base ferroelectric material (112), for example aluminum scandium nitride AlScN.