Nitride Semiconductor Gate Recess Structure for Threshold Voltage Control
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Solution Overview
Problem
Existing nitride-based semiconductor devices face challenges in fabricating normally off-type devices with reduced on-resistance and controlling threshold voltage with good yield, due to the difficulty in precisely controlling the thickness and composition of barrier layers, leading to variations in carrier density and increased resistance.
Innovation Solution
A nitride-based semiconductor device structure is developed, featuring a carrier traveling layer, a barrier layer with a smaller lattice constant, a threshold voltage control layer with the same lattice constant as the carrier traveling layer, and a carrier inducing layer with a smaller lattice constant, where the gate electrode is formed in a recess structure reaching the threshold voltage control layer, and source and drain electrodes are placed on the barrier, threshold voltage control, or carrier inducing layers, allowing for precise control of threshold voltage and reduced on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the barrier layer thickness is reduced to lower threshold voltage, then the device can be normally off-type, but the manufacturing precision becomes difficult to control and yield decreases
Solution Approach 1:
A recess structure is introduced as an intermediary element between the barrier layer and the gate electrode. This recess allows the gate electrode to extend closer to the two-dimensional electron gas without requiring precise control of the entire barrier layer thickness, thereby enabling normally off-type operation while reducing manufacturing difficulty and improving yield.
Solution Approach 2:
The barrier layer is effectively segmented by the recess structure, creating distinct regions: a first region under the gate electrode with reduced thickness and a second region in the source/drain areas with full thickness. This segmentation allows independent optimization of threshold voltage control and contact resistance reduction.
2Reliability
If the barrier layer thickness is increased to reduce contact resistance, then source/drain performance improves, but the threshold voltage control becomes difficult and on-resistance increases
Solution Approach 1:
The barrier layer is given different effective thicknesses in different locations: thicker regions under source/drain electrodes for low contact resistance, and thinner effective thickness under the gate electrode (achieved through recess) for proper threshold voltage control. This local differentiation resolves the contradiction between contact resistance and threshold voltage control.
3Manufacturing precision
If the Al composition in the barrier layer is increased to control carrier density, then threshold voltage control improves, but lattice mismatch distortion increases and manufacturing becomes more difficult
Solution Approach 1:
The invention changes the structural parameter of the barrier layer by introducing a recess, which effectively decouples the relationship between barrier layer thickness and threshold voltage control. This allows use of higher Al composition in the barrier layer for better carrier density control without exacerbating lattice mismatch issues, as the recess provides an additional degree of freedom for threshold voltage adjustment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables uniform threshold voltage control and reduced on-resistance by minimizing the impact of barrier layer thickness variations, achieving a high-yield production of nitride-based semiconductor devices with improved performance.
Implementation Method 1
the lattice constant of the barrier layer becomes small compared to the carrier traveling layer, so that a distortion is produced on the barrier layer. In the nitride-based semiconductor device, piezoelectric charge is produced in the barrier layer due to the piezo effect caused by the distortion in the barrier layer. A two-dimensional electron gas is generated at the interface between the carrier traveling layer and the barrier layer due to the generated piezoelectric charge.
Data Source
AI summary
The nitride-based semiconductor device includes a carrier traveling layer 1 composed of non-doped AlxGa1-xN (0≤X<1); a barrier layer 2 formed on the carrier traveling layer 1 and composed of non-doped or n-type AlYGa1-YN (0<Y≤1, X<Y) having a lattice constant smaller than that of the carrier traveling layer 1; a threshold voltage control layer 3 formed on the barrier layer 2 and composed of a non-doped semiconductor having a lattice constant equal to that of the carrier traveling layer 1; and a carrier inducing layer 4 formed on the threshold voltage control layer 3 and composed of a non-doped or n-type semiconductor having a lattice constant smaller than that of the carrier traveling layer 1. The nitride-based semiconductor device further includes a gate electrode 5 formed in a recess structure, a source electrode 6 and a drain electrode 7.