Nitride Semiconductor Isolation Layout for Low Output Capacitance
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Solution Overview
Problem
High output capacitance in semiconductor devices limits their performance in high-frequency power applications, as it leads to significant switching losses due to the capacitance between the drain electrode and the substrate or package, making it difficult to achieve both high breakdown field strength and high electron mobility.
Innovation Solution
The semiconductor device incorporates a multi-finger structure with separated first and second wiring portions and element isolation areas in the nitride semiconductor layer, reducing the capacitance between the drain electrode and the substrate or package, and utilizing a low relative permittivity insulation film to further minimize capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a conventional semiconductor device structure is used, then high breakdown field strength can be achieved, but output capacitance becomes large leading to high switching losses
Solution Approach 1:
The drain electrode is divided into multiple separated wiring portions (first wiring portion, second wiring portion, third wiring portion) with element isolation areas between them. This segmentation reduces the effective capacitance area between the drain electrode and substrate, thereby reducing output capacitance and switching losses while maintaining high breakdown field strength through the distributed structure
Solution Approach 2:
Element isolation areas filled with insulating material are introduced as intermediary structures between the separated wiring portions of the drain electrode. These isolation areas act as mediators that electrically isolate adjacent drain regions, reducing parasitic capacitance and enabling lower switching losses while preserving the high voltage blocking capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration results in a semiconductor device with low output capacitance, reducing switching losses and enabling high breakdown field strength and electron mobility, making it suitable for high-frequency power applications.
Implementation Method 1
reducing the capacitance between the drain electrode and the substrate or package
Implementation Method 2
utilizing a low relative permittivity insulation film to further minimize capacitance
Data Source
AI summary
A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.