Nitride Heterostructure Recess Angle for Lower On-Resistance
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Solution Overview
Problem
The on-resistance of Group III nitride semiconductor devices, while reduced to some extent by recessed structures, requires further reduction for improved performance in power semiconductor applications.
Innovation Solution
A nitride semiconductor device structure featuring a first nitride semiconductor layer with a recess, a second nitride semiconductor layer with a larger band gap covering the first layer and the recess, and a third nitride semiconductor layer with a larger band gap than the first layer, where the contact angle between the side wall of the recess and the interface between the first and second layers ranges from 140° to less than 180°, optimizing the flow of electrons and increasing the concentration of two-dimensional electron gas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a recessed structure is used in the semiconductor device, then the on-resistance is reduced to some extent, but the on-resistance still requires further reduction for power semiconductor applications
Solution Approach 1:
The patent applies parameter changes by precisely controlling the contact angle of the recess side wall to be 140° or more and less than 180°. This specific angular parameter optimization modifies the electric field distribution and electron flow characteristics, achieving further reduction in on-resistance beyond what conventional recessed structures provide, thereby meeting power semiconductor performance requirements
Solution Approach 2:
The patent implements local quality by creating a recess with specifically engineered side wall angles in the AlGaN barrier layer. This localized structural modification with precise angular control (140°-180°) optimizes the electric field concentration and two-dimensional electron gas distribution at critical regions, reducing on-resistance without compromising other device characteristics
2Reliability
If the contact angle of the recess side wall is optimized to reduce on-resistance, then the concentration of two-dimensional electron gas increases, but the device structure becomes more complex
Solution Approach 1:
The patent utilizes parameter changes by defining a specific contact angle range (140°-180°) for the recess side wall. This parameter optimization achieves enhanced two-dimensional electron gas concentration and reduced on-resistance while maintaining manufacturability, balancing performance improvement with structural complexity
Solution Approach 2:
The patent applies dimensional analysis by focusing on the angular dimension (contact angle) of the recess structure. By optimizing this specific geometric parameter in the angular domain, the patent achieves improved electrical characteristics without requiring complex multi-dimensional structural modifications, thus controlling device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces on-resistance and increases maximum drain current, enabling higher speed operation and improved performance in power semiconductor devices.
Implementation Method 1
Piezoelectric charges produced by the difference in lattice constant between AlGaN and GaN and the difference in band gap between AlGaN and GaN can cause a channel of electrons with high mobility and high concentration (two-dimensional electron gas; 2DEG) to be generated at the interface between AlGaN and GaN
Implementation Method 2
the tapered side walls of the recess can reduce the concentration of the electric field on the edges of the recess, on which the electric field concentrates after the edges of the gate layer
Data Source
AI summary
A nitride semiconductor device includes: a substrate; and a first nitride semiconductor layer, a second nitride semiconductor layer, and a third nitride semiconductor layer that are disposed above the substrate in the stated order. The first nitride semiconductor layer includes a recess. The second nitride semiconductor layer has a band gap larger than a band gap of the first nitride semiconductor layer and is disposed in a region other than the recess. The third nitride semiconductor layer has a band gap larger than the band gap of the first nitride semiconductor layer and covers the first nitride semiconductor layer and the second nitride semiconductor layer including an inner wall of the recess. A contact angle at which a side wall of the recess and an interface between the first nitride semiconductor layer and the second nitride semiconductor layer meet ranges from 140° to less than 180°.