Group III Nitride Semiconductor Light Emitting Element Warping Control

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Solution Overview

Problem

Group III nitride semiconductor light emitting elements face challenges in achieving excellent crystallinity and stable emission characteristics due to substrate warping and lattice mismatch issues during epitaxial growth, leading to uneven light emission and reduced output power.

Innovation Solution

A method involving the lamination of an intermediate layer, underlayer, and n-type contact layer on a substrate with controlled warping, followed by X-ray rocking curve half width adjustments to minimize substrate warping and enhance crystallinity, resulting in a semiconductor layer with improved emission intensity and stable wavelength distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a low temperature buffer layer is laminated on the substrate to avoid lattice mismatch, then crystallinity of the semiconductor layer is improved, but the substrate warping increases due to thermal expansion differences during high temperature epitaxial growth

Engineering Contradiction:
ImprovecrystallinityVSAvoidsubstrate warping
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

The patent applies preliminary action by pre-forming the low temperature buffer layer (AlN or AlGaN) on the substrate before high temperature epitaxial growth. This buffer layer is deposited at lower temperatures (e.g., 500-800°C) to establish a crystalline foundation that accommodates lattice mismatch, thereby preventing substrate warping during subsequent high temperature processing while ensuring excellent crystallinity of the overlying semiconductor layers.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the substrate is exposed to high temperature during underlayer formation, then the semiconductor layer can be epitaxially grown, but the substrate warps due to different coefficients of thermal expansion

Engineering Contradiction:
Improveepitaxial growth qualityVSAvoidsubstrate warping
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

The patent uses the low temperature buffer layer as an intermediary between the substrate and the high temperature epitaxial growth process. This buffer layer acts as a thermal and mechanical mediator that protects the substrate from direct high temperature exposure, reducing thermal stress and preventing warping while still allowing high quality epitaxial growth of the semiconductor layers above it.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Shape

If a thin epitaxial layer is formed to suppress substrate warping, then warping is reduced, but the crystallinity and light emission characteristics deteriorate

Engineering Contradiction:
Improvesubstrate warpingVSAvoidcrystallinity
Core Design Contradiction:
ShapeVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a low temperature buffer layer first, which suppresses substrate warping during subsequent high temperature growth. This preliminary layer enables the formation of thicker epitaxial layers with excellent crystallinity without causing excessive warping, as the buffer layer has already accommodated the thermal expansion differences.

Inventive Principle:
Principle #10Preliminary action

4Manufacturing precision

If a buffer layer is formed by sputtering method before MOCVD, then lattice mismatch is avoided, but the process complexity increases

Engineering Contradiction:
Improvelattice mismatch compensationVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by utilizing the inherent properties of the low temperature buffer layer deposition process. By controlling deposition temperature, composition (AlN or AlGaN), and thickness parameters of the buffer layer, the patent achieves effective lattice mismatch compensation without requiring complex multi-step buffer layer structures or specialized equipment sequences.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method achieves a semiconductor light emitting element with excellent crystallinity and stable emission characteristics, reducing substrate warping and improving light emission efficiency and uniformity.

Implementation Method 1

a X-ray rocking curve half width of a (0002) plane is 100 arcsec or less and a X-ray rocking curve half width of a (10-10) plane is 300 arcsec or less

Methodology Applied
Scientific EffectX-ray diffraction: X-Ray

Implementation Method 2

a layer called a low temperature buffer layer made of aluminum nitride (AlN) or aluminum gallium nitride (AlGaN) is firstly laminated on a substrate, and then a group III nitride semiconductor crystal is epitaxially grown thereon

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Data Source

PatentUS8772060B2Method for manufacturing group III nitride semiconductor light emitting element, group III nitride semiconductor light emitting element and lamp
Publication Date: 2014.07.08 TOYODA GOSEI CO LTD
  • US8772060B2 patent drawing
  • US8772060B2 patent drawing
  • US8772060B2 patent drawing

AI summary

The present invention provides a method for manufacturing a group III nitride semiconductor light emitting element, with which warping can be suppressed upon the formation of respective layers on the substrate, a semiconductor layer including a light emitting layer of excellent crystallinity can be formed, and excellent light emission characteristics can be obtained; such a group III nitride semiconductor light emitting element; and a lamp. Specifically disclosed is a method for manufacturing a group III nitride semiconductor light emitting element, in which an intermediate layer, an underlayer, an n-type contact layer, an n-type cladding layer, a light emitting layer, a p-type cladding layer, and a p-type contact layer are laminated in sequence on a principal plane of a substrate, wherein a substrate having a diameter of 4 inches (100 mm) or larger, with having an amount of warping H within a range from 0.1 to 30 μm and at least a part of the edge of the substrate warping toward the principal plane at room temperature, is prepared as the substrate; the X-ray rocking curve full width at half maximum (FWHM) of the (0002) plane is 100 arcsec or less and the X-ray rocking curve FWHM of the (10-10) plane is 300 arcsec or less, in a state where the intermediate layer has been formed on the substrate and where thereafter the underlayer and the n-type contact layer are formed on the intermediate layer; and furthermore the n-type cladding layer, the light emitting layer, the p-type cladding layer, and the p-type contact layer are formed on the n-type contact layer.