Nitride Spacer Protects Oxide Layers in Flash Memory

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Solution Overview

Problem

The miniaturization of flash memory devices makes them susceptible to performance variations due to small structural changes, requiring improved manufacturing processes and designs to maintain performance and integrity.

Innovation Solution

A nitride spacer is used to prevent the oxide layer between the control gate and floating gate electrodes from being encroached during oxidation, increasing the thickness of the oxide layer between the floating gate and the semiconductor substrate, thereby enhancing electrical properties and device reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the oxide layer thickness is increased to improve electrical properties, then the gate coupling ratio and threshold voltage window are improved, but the oxide layer between control gate and floating gate may be encroached by oxidation process

Engineering Contradiction:
Improveelectrical propertiesVSAvoidoxide layer thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A nitride spacer layer is introduced as an intermediary protective barrier between the oxidation environment and the oxide layers. The nitride spacer is conformally deposited on the gate structure and selectively removed to protect specific oxide layers during the oxidation process, preventing unwanted encroachment while allowing controlled oxidation where needed.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The nitride spacer is formed on the gate structure before the oxidation process is performed. This preliminary protective layer prevents the oxidation process from encroaching on the oxide layer between the control gate and floating gate, while still allowing the oxide layer between the floating gate and semiconductor substrate to be thickened through controlled oxidation.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If the flash memory device size is reduced to increase density, then the device integration is improved, but the performance becomes more sensitive to small structural variations

Engineering Contradiction:
Improvedevice sizeVSAvoidperformance stability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

Different regions of the gate structure receive different treatments through the selective removal of the nitride spacer. The oxide layer between the floating gate and semiconductor substrate is locally thickened to improve electrical properties, while the oxide layer between control gate and floating gate is protected to maintain structural stability. This local differentiation maintains performance stability despite overall device miniaturization.

Inventive Principle:
Principle #3Local quality

3Reliability

If the oxide layer between floating gate and control gate is protected from oxidation, then the gate coupling ratio is improved, but additional process steps are required

Engineering Contradiction:
Improvegate coupling ratioVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The nitride spacer serves multiple functions: it acts as a protective barrier during oxidation, provides a template for selective area protection, and can be integrated with existing spacer formation processes in flash memory manufacturing. This multi-functionality reduces the overall process complexity despite the additional protective function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution increases the gate coupling ratio and threshold voltage window, reduces voltage requirements, and improves the reliability and endurance of the semiconductor memory device by protecting the oxide layers from oxidation.

Implementation Method 1

an oxidation process is performed after the step of forming the nitride spacer. A thickness of an edge portion of the first oxide layer is increased by the oxidation process.

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS10510758B2Semiconductor memory device and manufacturing method thereof
Publication Date: 2019.12.17 UNITED MICROELECTRONICS CORP
  • US10510758B2 patent drawing
  • US10510758B2 patent drawing
  • US10510758B2 patent drawing

AI summary

A manufacturing method of a semiconductor memory device includes the following steps. A gate structure is formed on a semiconductor substrate. The gate structure includes a floating gate electrode, a control gate electrode, a first oxide layer, and a second oxide layer. The control gate electrode is disposed on the floating gate electrode. The first oxide layer is disposed between the floating gate electrode and the semiconductor substrate. The second oxide layer is disposed between the floating gate electrode and the control gate electrode. An oxide spacer layer is conformally on the gate structure and the semiconductor substrate. A nitride spacer is formed on the oxide spacer layer and on a sidewall of the gate structure. An oxidation process is performed after the step of forming the nitride spacer. A thickness of an edge portion of the first oxide layer is increased by the oxidation process.