Nitrided Barrier Layer for Void-Free TSV Metallization
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Solution Overview
Problem
Conventional lithography struggles to create smaller structures in modern integrated circuitry, and three-dimensional packaging technologies face challenges in achieving faster signal propagation due to limitations in through-silicon via (TSV) metallization, particularly with high aspect ratio TSVs where voids reduce the reliability of interconnections between semiconductor chips.
Innovation Solution
The implementation of a nitridation process to convert a surface portion of the metallic barrier layer in TSVs to a nitride surface layer, enhancing the nucleation of subsequent depositions and improving the fill quality of copper metal, thereby reducing voids by more than 50% compared to current processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography is used to create smaller structures, then manufacturing precision is maintained, but the ability to create smaller structures deteriorates
Solution Approach 1:
The patent transitions from planar 2D lithography to 3D vertical interconnection through TSVs, enabling continued scaling by moving the interconnection approach to the third dimension rather than relying solely on lateral lithographic resolution
2Reliability
If TSV density is increased to improve 3D packaging, then interconnection speed is improved, but void formation increases reducing reliability
Solution Approach 1:
A copper seed layer is deposited on the TSV walls before electroplating, creating a nucleation layer that ensures uniform copper deposition and prevents void formation during the subsequent electroplating process
Solution Approach 2:
The copper seed layer acts as an intermediary between the TSV wall and the electroplated copper, facilitating uniform deposition and eliminating direct contact issues that cause voids
3Speed
If TSV length is reduced to improve signal propagation, then interconnection speed is improved, but manufacturing complexity increases
Solution Approach 1:
The TSV manufacturing process is segmented into distinct stages: etching, barrier layer deposition, copper seed layer deposition, and electroplating. This segmentation allows each step to be optimized independently, managing complexity while achieving short, high-quality interconnections
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the wettability and metallization of TSVs, leading to improved performance and yield in three-dimensional integrated circuits by reducing voids and increasing the reliability of interconnections between semiconductor chips.
Implementation Method 1
A nitridation process is performed to convert a surface portion of the metallic barrier layer to a nitride surface layer
Implementation Method 2
The nitride surface layer enhances the nucleation of subsequent depositions
Implementation Method 3
A metal is deposited to fill the through substrate via
Data Source
AI summary
In one aspect of the invention, a method to create an advanced through silicon via structure is described. A high aspect ratio through substrate via in a substrate is provided. The through substrate via has vertical sidewalls and a horizontal bottom. A metallic barrier layer is deposited on the sidewalls of the through substrate via. A nitridation process is performed to convert a surface portion of the metallic barrier layer to a nitride surface layer. The nitride surface layer enhances the nucleation of subsequent depositions. A metal is deposited to fill the through substrate via. Another aspect of the invention is a device created by the method.


