NMOS Metal Gate Integration for CMOS Performance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current CMOS transistor fabrication techniques face challenges in optimizing the performance of NMOS and PMOS transistors, particularly in reducing depletion capacitance and improving hole mobility, which affects the overall efficiency and speed of the transistors.
Innovation Solution
The use of metal gates for NMOS transistors and fully silicided polysilicon gates for PMOS transistors, along with the incorporation of SiGe source/drain regions and compressive etch stop layers, to enhance transistor performance by reducing depletion capacitance and improving hole mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If polysilicon gates are used for both NMOS and PMOS transistors, then the fabrication process is simple and uniform, but depletion capacitance is high and hole mobility is limited
Solution Approach 1:
The gate structure is segmented into two types: polysilicon gates for PMOS transistors and metal gates for NMOS transistors. This segmentation allows each transistor type to have optimized gate material properties, with metal gates providing lower depletion capacitance for NMOS and polysilicon gates providing adequate performance for PMOS, thereby resolving the contradiction between manufacturing simplicity and transistor performance.
Solution Approach 2:
Different gate materials are applied to different transistor types based on their specific performance requirements. Metal gates with lower depletion capacitance are used specifically for NMOS transistors where high-speed performance is critical, while polysilicon gates are used for PMOS transistors. This local differentiation optimizes each transistor type's performance without requiring complete redesign of the entire fabrication process.
2Speed
If metal gates are used for NMOS transistors, then depletion capacitance is reduced and speed is improved, but the fabrication process complexity increases
Solution Approach 1:
The fabrication process is segmented into separate treatment paths for NMOS and PMOS gates. Metal gate deposition and processing steps are applied only to NMOS regions, while PMOS regions follow the standard polysilicon gate process. This segmentation enables speed improvement for NMOS transistors through metal gates while containing fabrication complexity by limiting metal gate processing to only where needed.
Solution Approach 2:
Photolithography masks serve as intermediaries to selectively protect PMOS gate regions during metal gate deposition and processing steps. The masks enable precise spatial control, allowing metal gates to be formed only in NMOS regions while leaving PMOS polysilicon gates untouched, thereby managing fabrication complexity through controlled selectivity.
3Reliability
If fully silicided polysilicon gates are used for PMOS transistors, then hole mobility is improved, but manufacturing precision requirements increase
Solution Approach 1:
The polysilicon gate structure is prepared in advance with specific doping and thickness characteristics before silicide formation. This preliminary preparation ensures that when silicidation occurs, it produces the desired electrical properties for hole mobility enhancement. By pre-configuring the polysilicon gate parameters, the subsequent silicide formation process becomes more predictable and less sensitive to manufacturing variations.
Data Source
AI summary
A method for making an NMOS transistor on a semiconductor substrate includes reducing the thickness of the PMD layer to expose the polysilicon gate electrode of the NMOS transistor and the polysilicon gate electrode of the PMOS transistor, and then removing the gate electrode of the NMOS transistor. The method also includes depositing a NMOS-metal layer over the semiconductor substrate, depositing a fill-metal layer over the NMOS-metal layer, and then reducing the thickness of the NMOS metal layer and the fill metal layer to expose the gate electrodes of the NMOS transistor and the PMOS transistor.