NMOS Pass Gate Current Clamp for Latch-Up Immunity
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Solution Overview
Problem
Integrated circuits (ICs) face latch-up issues due to parasitic bipolar junction transistors, particularly at input/output pads connected to NMOS pass gates, which can lead to circuit malfunction and failure, especially when exposed to transients or improper connections.
Innovation Solution
Incorporating an NMOS pass transistor with a current clamp between the node and a current sink, which reduces the voltage at the node from negative values to near ground level, preventing latch-up by diverting most of the current away from sensitive circuit elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an NMOS pass gate is used at I/O pads, then device complexity is reduced and ease of manufacture is improved, but latchup susceptibility increases due to parasitic BJT conduction
Solution Approach 1:
A current clamp circuit is introduced as an intermediary component between the NMOS pass gate and the I/O pad. This current clamp acts as a mediator that monitors and limits the current flowing through the pass gate, preventing the parasitic BJT conduction that causes latchup while allowing the simple NMOS structure to remain in use
Solution Approach 2:
The current clamp circuit provides preliminary protection by preemptively limiting current before latchup can occur. By continuously monitoring and clamping the current at safe levels, the circuit prevents the conditions necessary for latchup from developing in the first place
2Reliability
If current clamp is added to prevent latchup, then latchup immunity is improved, but device complexity increases
Solution Approach 1:
The current clamp functionality is merged with the existing pass gate structure by sharing common components and circuit elements. The current clamp uses the same transistor devices and interconnect structures already present in the pass gate, combining multiple functions into a unified circuit design that minimizes additional complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces the current injected into the substrate, minimizing the risk of latch-up during testing and operation, thereby enhancing IC reliability and preventing damage from electrical stress.
Implementation Method 1
A current clamp is connected between the node and a current sink
Data Source
AI summary
An integrated circuit includes a pass gate having an input and an output. An NMOS pass transistor is connected between the input and the output. The drain of the NMOS pass transistor is connected to the input and the source of the NMOS pass transistor is connected to a node between the source of the NMOS transistor and the output of the pass gate. A current clamp is connected between the node and a current sink so as to conduct current to the current sink when the node reaches a threshold value.