Programmable NOC Data-Width Reconfiguration for Bandwidth Matching
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Solution Overview
Problem
Fixed interconnect networks in programmable logic devices, such as FPGAs, often lead to underutilization and inefficiencies due to mismatched bandwidth requirements between the network-on-chip (NOC) and the protocols used by the circuit design.
Innovation Solution
A programmable interconnect network with flexible data paths that can dynamically adjust its bandwidth by logically bonding subsets of physical data paths together, allowing for application-dependent bandwidth allocation and power-gating of unused channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the network-on-chip (NOC) is designed with a fixed wide bandwidth to accommodate future protocols, then the NOC can support higher bandwidth protocols in the future, but the NOC will be underutilized when current protocols with smaller bandwidth are used, leading to inefficiencies and higher power consumption
Solution Approach 1:
The patent implements a dynamically reconfigurable interconnect network that can adjust its data path width based on the specific protocol and bandwidth requirements of the circuit design being implemented. The interconnect fabric allows runtime reconfiguration of channel widths, transforming a static fixed-width network into a dynamic adaptive system that optimizes bandwidth utilization for each application scenario
2Adaptability or versatility
If the network-on-chip (NOC) is designed with a fixed wide bandwidth, then the NOC can accommodate high-bandwidth protocols, but power consumption increases due to underutilization of the network resources
Solution Approach 1:
The patent changes the operational parameters of the interconnect network by allowing dynamic adjustment of data path width and channel configuration. Instead of maintaining a fixed wide bandwidth, the system adapts parameter values (channel width, number of active paths) to match the actual bandwidth requirements, thereby reducing power consumption when full bandwidth is not needed while maintaining the capability to support high-bandwidth protocols when required
3Use of energy by stationary object
If the network-on-chip (NOC) bandwidth is matched exactly to the protocol requirements, then power consumption is minimized, but the NOC cannot accommodate protocols with different bandwidth requirements
Solution Approach 1:
The patent creates a universal interconnect network architecture that can serve multiple protocol types and bandwidth requirements through a single reconfigurable fabric. The system achieves multi-functionality by allowing the same physical infrastructure to be dynamically reconfigured to match different protocol specifications, eliminating the need for separate dedicated networks for each protocol type
Data Source
AI summary
Techniques described herein may relate to providing a programmable interconnect network (e.g., a programmable network-on-chip (NOC)). A method may include determining a transmission parameter, bonding one or more channels of an interconnect network based at least in part on the transmission parameter, and power-gating any unused channels after the bonding.