Non-Volatile Memory Read Voltage Control with LLR Feedback

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Solution Overview

Problem

Existing memory systems face challenges in accurately reading and correcting errors in non-volatile memory due to variations in threshold voltage distributions and read voltage settings, leading to inefficiencies in data retrieval and storage.

Innovation Solution

A memory system that includes a non-volatile memory and a memory controller, which sets multiple read voltages based on shift values, acquires hard and soft bit data, performs error correction, and adjusts shift values based on log likelihood ratios (LLR) to improve data reading accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If fixed read voltage settings are used, then device complexity is reduced, but data reading accuracy deteriorates due to threshold voltage variations

Engineering Contradiction:
Improvedata reading accuracyVSAvoidread voltage setting complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements dynamic read voltage adjustment by storing multiple read voltages in a lookup table and selecting appropriate voltages based on shift values that compensate for threshold voltage distributions. This transforms the static read voltage system into a dynamic one that adapts to memory cell variations, thereby improving data reading accuracy without excessive complexity increase.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the read voltage parameter based on shift values that are determined from threshold voltage distribution characteristics. By adjusting the read voltage parameter dynamically according to memory cell state, the system achieves higher reading accuracy while managing complexity through parameter optimization rather than structural complexity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple read voltages are applied, then error correction capability is improved, but processing time increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-calculating and storing multiple read voltages in a lookup table based on shift values before actual data reading operations. This preparation work is done in advance, so during operational reading, the system can quickly select and apply appropriate voltages without excessive processing time, thus improving error correction capability efficiently.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial action by selectively using multiple read voltages only when error correction is needed, rather than always applying all possible voltages. The system determines the appropriate level of voltage adjustment based on the specific memory cell state, achieving sufficient error correction capability while minimizing unnecessary processing time.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If shift values are adjusted based on LLR, then data retrieval accuracy is enhanced, but computational complexity increases

Engineering Contradiction:
Improvedata retrieval accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements feedback by using log likelihood ratios (LLR) from error correction results to determine appropriate shift values for adjusting read voltages. The error correction outcome feeds back into the voltage selection process, creating a closed-loop system that continuously optimizes reading accuracy based on actual performance, thereby enhancing data retrieval accuracy while managing computational complexity through efficient feedback utilization.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250252044A1Memory system and method of controlling non-volatile memory
Publication Date: 2025.08.07 KIOXIA CORP
  • US20250252044A1 patent drawing
  • US20250252044A1 patent drawing
  • US20250252044A1 patent drawing

AI summary

According to one embodiment, a memory system comprises a non-volatile memory that includes a plurality of memory cells and a memory controller. The memory controller is configured to set a first read voltage based on a first shift value, acquire hard bit data by a first read operation using the first read voltage, set a second read voltage based on a second shift value, acquire soft bit data by a second read operation using the second read voltage, execute first error correction by using the hard bit data and the soft bit data, calculate a first log likelihood ratio (LLR) by using at least a result of the first error correction that has failed, and correct at least one of the first shift value and the second shift value based on the first LLR.