Nonlinear Control Gate Electrodes for 3D NAND Stress Management

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Solution Overview

Problem

Existing three-dimensional NAND memory devices face challenges in achieving high density and minimizing substrate warpage due to compressive or tensile stress from control gate electrodes, which can lead to mechanical instability and manufacturing issues.

Innovation Solution

The implementation of nonlinear control gate electrodes and slit trenches to redistribute stress, combined with a method of forming memory devices with alternating layers and etching techniques to create memory openings and backside openings, reduces substrate warpage and enhances mechanical stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If control gate electrodes are added to increase storage density, then storage density is improved, but substrate warpage and mechanical instability worsen due to compressive or tensile stress

Engineering Contradiction:
Improvestorage densityVSAvoidmechanical stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The control gate electrode is segmented into multiple sections along the vertical channel, with insulating layers separating adjacent conductive sections. This segmentation distributes the stress along the electrode structure rather than concentrating it, reducing substrate warpage while maintaining the electrode's control function over the channel

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different sections of the control gate electrode have different electrical properties (conductive vs. insulating), allowing local optimization where conductive sections provide control functionality and insulating sections reduce stress transmission to the substrate

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If more control gate electrodes are stacked vertically, then storage density is improved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvestorage densityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

Multiple control gate electrodes are merged into a single continuous electrode structure that extends vertically through multiple memory cell layers, with insulating layers integrated within the same structure. This combining approach achieves high density without proportionally increasing manufacturing steps

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If control gate electrodes are made continuous to simplify structure, then device complexity is reduced, but substrate warpage increases due to accumulated stress

Engineering Contradiction:
Improvestructure simplicityVSAvoidsubstrate warpage
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The continuous control gate electrode is divided into discrete conductive sections separated by insulating layers, maintaining structural simplicity while eliminating stress accumulation that would occur in a fully continuous electrode

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3195359B1Three dimensional NAND device having nonlinear control gate electrodes
Publication Date: 2019.04.24 SANDISK TECHNOLOGIES LLC
  • EP3195359B1 patent drawingFigure 1
  • EP3195359B1 patent drawingFigure 2A
  • EP3195359B1 patent drawingFigure 2B

AI summary

A monolithic three dimensional NAND string includes a plurality of control gate electrodes extending substantially parallel to a major surface of a substrate in at least one active region, a plurality of semiconductor channels having at least one end portion of each of the plurality of semiconductor channels extending substantially perpendicular to the major surface of the substrate, at least one memory film located between each of the plurality of control gate electrodes and each respective semiconductor channel of the plurality of semiconductor channels, and at least one first slit trench extending substantially perpendicular to the major surface of the substrate. Each of the plurality of control gate electrodes has a nonlinear side wall adjacent to the at least one first slit trench in the at least one active region.