Nonlinear Element Switching Device for Leakage Suppression
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Solution Overview
Problem
Conventional non-volatile memory devices face challenges such as short channel effects, sub-threshold slope non-scaling, increased power dissipation, and leakage current issues, particularly in two-terminal devices, which hinder their scalability and reliability.
Innovation Solution
A non-volatile memory cell structure incorporating a substrate, first and second electrodes, a switching medium, and a nonlinear element configured to change resistance states in response to voltage, effectively suppressing leakage current and enabling high-density, high-speed memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If transistor size is reduced to increase integration density, then device density is improved, but leakage current increases and short channel effects worsen
Solution Approach 1:
The patent divides the memory cell into three distinct components: a selector device (diode or transistor), a memory element (resistive switching element), and electrodes. This segmentation allows the selector to actively control current flow, preventing leakage through unselected cells while the memory element provides the storage function. The physical and functional separation enables independent optimization of each component.
Solution Approach 2:
The selector device acts as an intermediary between the control circuitry and the memory element. It mediates current flow by selectively enabling or disabling conduction based on the state of adjacent word and bit lines, thereby preventing sneak paths and leakage current from affecting unselected memory cells.
2Reliability
If conventional diode is used to suppress leakage current, then leakage suppression is improved, but device complexity and fabrication difficulty increase
Solution Approach 1:
The patent merges the selector device and memory element into a single integrated memory cell structure that can be fabricated using unified CMOS-compatible processes. The selector and memory element share common electrodes and are formed in the same fabrication sequence, eliminating the need for separate diode fabrication steps and reducing overall device complexity.
Solution Approach 2:
The patent changes the fabrication parameters from high-temperature diode processes (>500°C) to standard CMOS-compatible temperature ranges. This is achieved by using transistor-based selectors that can be formed with standard CMOS materials and processes, and by using resistive switching elements that set at lower temperatures than conventional diode formation.
3Device complexity
If two-terminal device structure is used, then device simplicity is improved, but leakage current paths increase
Solution Approach 1:
The patent segments the current path control function from the memory storage function by introducing a selector device in series with the memory element. This creates a three-terminal or four-terminal structure where the selector actively controls current flow, preventing the formation of sneak paths that would otherwise exist in two-terminal devices.
Solution Approach 2:
The patent introduces dynamic control of current flow through the selector device, which can be turned on or off based on the states of control lines. This dynamic control prevents static leakage paths by actively blocking current flow through unselected cells, transforming the static two-terminal structure into a dynamically controlled multi-terminal structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a high-density non-volatile memory with low leakage current, high switching speed, and improved device yield, addressing the limitations of conventional memory devices by utilizing a nonlinear element to manage resistance states and mitigate sneak paths in memory arrays.
Implementation Method 1
a nonlinear element disposed between the first and second electrodes and electrically coupled in series to the first electrode and the switching medium. The nonlinear element is configured to change from a first resistance state to a second resistance state on application of a voltage greater than a threshold
Data Source
AI summary
Method for a memory including a first, second, third and fourth cells include applying a read, program, or erase voltage, the first and second cells coupled to a first top interconnect, the third and fourth cells coupled to a second top interconnect, the first and third cells coupled to a first bottom interconnect, the second and fourth cells are to a second bottom interconnect, each cell includes a switching material overlying a non-linear element (NLE), the resistive switching material is associated with a first conductive threshold voltage, the NLE is associated with a lower, second conductive threshold voltage, comprising applying the read voltage between the first top and the first bottom electrode to switch the NLE of the first cell to conductive, while the NLEs of the second, third, and the fourth cells remain non-conductive, and detecting a read current across the first cell in response to the read voltage.