Non-Planarized VCSEL Structure for Current Confinement and Bandwidth

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Solution Overview

Problem

Existing VCSEL designs face challenges in achieving high optical output efficiency and high modulation bandwidth due to issues with current blocking regions and optical mode confinement.

Innovation Solution

A non-planarized VCSEL design is introduced, featuring a blocking region and conductive channel cores formed by implantation and etching, which creates a heterojunction for selective current guidance and allows for non-planarized mirror layers with stepped periods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional VCSEL designs with planarized mirror layers are used, then manufacturing simplicity is maintained, but optical output efficiency and modulation bandwidth are limited

Engineering Contradiction:
Improveoptical output efficiencyVSAvoidmirror layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The mirror layers are segmented into different regions with different numbers of periods - a first region with a first number of periods and a second region with a second number of periods. This segmentation allows each region to be optimized for its specific function, improving optical output efficiency while managing structural complexity through functional division.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the mirror layers are assigned different local qualities in terms of the number of periods, creating zones with varying optical properties. This local quality variation enables enhanced optical confinement and output efficiency in specific areas without requiring complete restructuring of the entire device.

Inventive Principle:
Principle #3Local quality

2Productivity

If higher data transmission rates and distances are achieved in optical networks, then network performance improves, but copper wire network limitations are exceeded requiring advanced laser technology

Engineering Contradiction:
Improvedata transmission rateVSAvoidsignal transmission reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The VCSEL design incorporates dynamic characteristics through the heterogeneous mirror layer structure that enables high-speed modulation. The different period regions respond dynamically to electrical signals, allowing high data transmission rates while maintaining signal integrity and reliability through optimized optical confinement.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If dense VCSEL arrays are implemented to increase emitters per unit area, then device density improves, but thermal management and defect formation become critical challenges

Engineering Contradiction:
Improveemitters per unit areaVSAvoidthermal conductivity
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The mirror layers are segmented into different regions with different numbers of periods - a first region with a first number of periods and a second region with a second number of periods. This segmentation allows each region to be optimized for its specific function, improving optical output efficiency while managing structural complexity through functional division.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the mirror layers are assigned different local qualities in terms of the number of periods, creating zones with varying optical properties. This local quality variation enables enhanced optical confinement and output efficiency in specific areas without requiring complete restructuring of the entire device.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances fiber optic transceiver reliability, electro-optical bandwidth, and link distances, while also enabling higher maximum power per VCSEL and more emitters per unit area in dense arrays, with improved thermal conductivity and reduced defect formation.

Implementation Method 1

a blocking region and conductive channel cores formed by implantation and etching

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

the injected minority carriers form a population inversion in the quantum wells that produces optical gain. Optical gain occurs when photons in the active region stimulate electrons to recombine with holes in the conduction band to the valance band, which produces additional photons

Methodology Applied
Scientific EffectStimulated emission: Laser

Implementation Method 3

By using a sufficient number of alternating layers, a high percentage of light can be reflected by the mirror

Methodology Applied
Scientific EffectReflection: Reflection

Implementation Method 4

As light passes from a layer of one index of refraction to another, a portion of the light is reflected

Methodology Applied
Scientific EffectRefraction: Refraction

Data Source

PatentEP4203210B1Implant regrowth vcsel and vcsel array with heterogeneous combination of different vcsel types
Publication Date: 2025.06.11 II VI DELAWARE INC
  • EP4203210B1 patent drawingFigure 1
  • EP4203210B1 patent drawingFigure 2~2B
  • EP4203210B1 patent drawingFigure 2C

AI summary

A non-planarized VCSEL can include: a blocking region over or under an active region, the blocking region having a first thickness; one or more conductive channel cores in the blocking region, the one or more conductive channel cores having a second thickness that is larger than the first thickness, wherein the blocking region is defined by having an implant and the one or more conductive channel cores are devoid of the implant, wherein the blocking region is lateral the one or more conductive channel cores, the blocking region and one or more conductive channel cores being an isolation region; and a non-planarized semiconductor region of one or more non-planarized semiconductor layers over the isolation region. The VCSEL can include a planarized bottom mirror region below the active region and a non-planarized top mirror region above the isolation region, or a non- planarized bottom mirror region below the active region.