Non-Polar Nanorod Array Structure for Higher Quantum Efficiency
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Solution Overview
Problem
Conventional optoelectronic semiconductor devices using c-plane group-III nitride materials suffer from reduced quantum efficiency due to internal piezoelectric polarization, and existing methods for achieving non-polar orientations are costly and limited by substrate availability and electrical conductivity issues.
Innovation Solution
A method involving the deposition of a transparent and conductive oxide layer on an amorphous substrate, followed by annealing and the formation of a nanorod array using molecular beam epitaxy, which results in a non-polar group-III material with an a-plane or m-plane orientation, allowing for improved quantum efficiency and vertical current injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If c-plane group-III nitride materials are used in optoelectronic semiconductor devices, then ease of production is improved, but quantum efficiency deteriorates due to internal piezoelectric polarization field causing quantum confined Stark effect
Solution Approach 1:
The patent changes the crystal orientation parameter from conventional c-plane to non-polar a-plane or m-plane orientation. This parameter change eliminates the internal piezoelectric polarization field that causes quantum confined Stark effect, thereby improving quantum efficiency while maintaining production feasibility through alternative growth methods on amorphous substrates
2Loss of energy
If non-polar a-plane or m-plane orientation is achieved using conventional techniques, then quantum efficiency is improved, but manufacturing cost deteriorates and substrate size is limited
Solution Approach 1:
The patent employs amorphous substrates such as glass or silicon dioxide, which are inexpensive and readily available compared to conventional r-plane sapphire substrates. These substrates serve as temporary growth platforms that enable cost-effective production of non-polar GaN nanorod arrays without the high costs associated with specialized crystalline substrates
Solution Approach 2:
The patent changes the substrate material parameter from expensive crystalline substrates (r-plane sapphire) to inexpensive amorphous substrates (glass, silicon dioxide). This parameter change dramatically reduces manufacturing cost while still enabling non-polar GaN growth through controlled nanorod formation on the amorphous surface
3Loss of energy
If non-polar a-plane GaN film is grown on r-plane sapphire substrate, then quantum efficiency is improved, but electrical conductivity deteriorates requiring additional micrometer thick n-GaN layers
Solution Approach 1:
The patent extracts the electrical conductivity function from the substrate system by incorporating transparent conductive oxide layers (such as ITO - indium tin oxide) directly into the device structure. This eliminates the need for thick n-GaN layers that would otherwise be required to provide electrical conductivity, thereby simplifying the overall device structure
4Device complexity
If lateral current-injection geometry is implemented, then device structure is simplified, but current crowding effect increases causing heat generation and efficiency degradation
Solution Approach 1:
The patent transitions from lateral current-injection geometry to vertical current-injection geometry by growing GaN nanorods perpendicular to the substrate surface. This dimensional change in current injection path eliminates current crowding effects at contact interfaces, reduces heat generation, and improves overall device efficiency while maintaining structural simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach enhances quantum efficiency by increasing the volume of the quantum well and maintaining optimal spatial overlap of electron- and hole-wavefunctions, leading to improved power output and reduced current crowding effects.
Implementation Method 1
The transparent and conductive oxide layer is annealed to form an annealed transparent and conductive oxide layer having a cubic-oriented and/or rhombohedral-oriented surface
Implementation Method 2
The annealing of the transparent conductive oxide layer and the formation of the nanorod array are performed using molecular beam epitaxy (MBE)
Data Source
AI summary
A method of forming an optoelectronic semiconductor device involves providing an amorphous substrate. A transparent and conductive oxide layer is deposited on the amorphous substrate. The transparent and conductive oxide layer is annealed to form an annealed transparent and conductive oxide layer having a cubic-oriented and/or rhombohedral-oriented surface. A nanorod array is formed on the cubic-oriented and/or rhombohedral-oriented surface of the annealed transparent and conductive oxide layer. The annealing of the transparent conductive oxide layer and the formation of the nanorod array are performed using molecular beam epitaxy (MBE). The nanorods of the nanorod array comprise a group-III material and are non-polar.