Non-speculative Lock Elision for Hardware Transactional Memory

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Solution Overview

Problem

Concurrent access to shared memory by multiple tasks in computing devices leads to race situations, which are inadequately addressed by existing lock systems that are inefficient and burdensome for programmers, and transactional memory systems that result in high rollback rates.

Innovation Solution

Implementing a hardware transactional memory (HTM) system with non-speculative access instructions that allow tasks to check memory availability without creating cache lines, reducing conflicts and aborts, and using a meta data store to manage lock information for improved efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional lock systems are used to manage concurrent memory access, then race conditions are prevented, but programming complexity and overhead increase significantly

Engineering Contradiction:
Improverace condition preventionVSAvoidprogramming complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The hardware transactional memory system automatically manages lock acquisition, validation, and release without requiring programmer intervention. The HTM infrastructure self-manages the complexity of concurrent access control through hardware-based mechanisms, eliminating the need for manual lock management code while ensuring race condition prevention.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent replaces software-based lock management with hardware-based transactional memory mechanisms. Hardware infrastructure including transactional memory units, conflict detection logic, and automatic rollback capabilities substitute for traditional software lock implementations, reducing programming complexity while maintaining reliability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Speed

If speculative lock elision is used to improve performance, then execution speed increases, but transaction rollback rate increases

Engineering Contradiction:
Improveexecution speedVSAvoidtransaction success rate
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system performs preliminary non-speculative reads of lock status before executing transactions. By checking lock availability in advance through non-speculative memory reads, the system identifies conflicts before transaction execution begins, allowing for proactive scheduling adjustments rather than reactive rollbacks after speculative execution fails.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where lock status information obtained through non-speculative reads is used to adjust transaction scheduling decisions. The system continuously monitors lock availability and uses this feedback to make informed scheduling choices, reducing unnecessary rollbacks while maintaining high execution speed through speculative elision where safe.

Inventive Principle:
Principle #23Feedback

3Reliability

If non-speculative access instructions are used to check memory availability, then transaction conflicts are reduced, but access speed may be impacted

Engineering Contradiction:
Improvetransaction conflict reductionVSAvoidmemory access speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent segments memory access operations into two distinct types: non-speculative reads for lock status checking (used for conflict detection) and speculative reads for actual data access (used for transaction execution). This segmentation allows each access type to be optimized independently, with non-speculative reads ensuring reliability and speculative reads maximizing speed, thereby resolving the contradiction between conflict reduction and access speed.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9207967B2Using nonspeculative operations for lock elision
Publication Date: 2015.12.08 RED HAT INC
  • US9207967B2 patent drawing
  • US9207967B2 patent drawing
  • US9207967B2 patent drawing

AI summary

A method includes identifying a set of instructions to be executed as a transaction that is to access a section of memory, prior to executing the set of instructions as the transaction, facilitating a non-speculative access to a data cache, the data cache comprising a plurality of cache lines, each cache line comprising a lock to lock a respective portion of the memory, determining if the section of memory is available for the transaction in view of locks of the plurality of cache lines, and in response to a determination that the section of memory is not available, causing the non-speculative access to the data cache to be repeated.