Nonvolatile Latch Circuit With ECC for Power-Off Data Inversion
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Solution Overview
Problem
Semiconductor circuits with nonvolatile memory face data inversion issues during power supply stop, leading to erroneous data, which existing technologies fail to address effectively.
Innovation Solution
Incorporating a nonvolatile latch circuit that stores k-bit data and m-bit error correction data, utilizing ECC encoding and decoding to ensure correct data retrieval upon power restart, even in cases of data inversion during power supply stop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power supply is stopped to reduce power consumption, then power consumption is reduced, but data may be inverted resulting in erroneous data
Solution Approach 1:
The patent applies preliminary action by generating and storing error correction data (ECC) before the power supply is stopped. The ECC encoder creates correction data based on the stored data, and this correction data is held in nonvolatile memory along with the original data. When power is restored, if data inversion occurs, the pre-prepared error correction data enables automatic correction without requiring external intervention, thus resolving the contradiction between power saving and data integrity.
2Duration of action of stationary object
If nonvolatile memory is incorporated to maintain data during power stop, then data retention is improved, but data inversion errors may occur
Solution Approach 1:
The patent implements feedback through the error correction mechanism. The ECC decoder continuously monitors the stored data for errors and automatically corrects inversion errors using the error correction data. This closed-loop feedback system ensures that even though nonvolatile memory maintains data during power stops, any inversion errors that occur are detected and corrected, thereby maintaining both long data retention and high data accuracy.
3Reliability
If error correction mechanism is added, then error tolerance is improved, but circuit complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the error correction functionality into separate dedicated components: an ECC encoder that generates error correction data, nonvolatile memory units for storing both original data and correction data, and an ECC decoder for error detection and correction. This modular segmentation allows the error correction mechanism to be integrated systematically, improving error tolerance while managing circuit complexity through organized functional blocks rather than monolithic complex circuits.
Data Source
AI summary
A semiconductor circuit according to an embodiment of the present disclosure includes a nonvolatile latch circuit that stores k-bit data, and m-bit error correction data for the k-bit data.