Nonvolatile Memory Device Reducing Sneak Currents via Localized Bias Control
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Solution Overview
Problem
In nonvolatile semiconductor memory devices, sneak currents between unselected and selected word lines or bit lines lead to increased power consumption during access operations due to the bias state required for data write in ReRAM memory cell arrays.
Innovation Solution
A nonvolatile semiconductor memory device with a control unit that adjusts the potential of word lines and bit lines to apply a lower bias to unselected memory cells closer to the center of the memory cell array, reducing sneak currents by varying the unselected word line potential and bit line potential based on their position, and optionally adjusting select transistor gate widths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a bias is applied to unselected word lines and bit lines to prevent data write to unselected memory cells, then data integrity is maintained, but sneak currents flow between unselected and selected lines via unselected memory cells causing increased power consumption
Solution Approach 1:
The patent applies different bias conditions to different regions of the memory cell array. Specifically, unselected word lines are divided into two groups: those closer to the selected word line receive a first bias condition, while those farther away receive a second bias condition. This spatial differentiation of bias conditions reduces sneak currents in distant regions while maintaining data integrity in regions closer to the selected cell.
Solution Approach 2:
The patent segments the unselected word lines into multiple groups based on their distance from the selected word line. This segmentation allows independent control of bias conditions for different segments, enabling optimization of power consumption by applying weaker bias conditions to segments that contribute less to sneak currents while maintaining strong bias conditions for segments critical to preventing unauthorized writes.
2Loss of energy
If the bias applied to all unselected memory cells is reduced to minimize sneak currents, then power consumption decreases, but the ability to prevent data changes in unselected cells is compromised
Solution Approach 1:
Different bias conditions are applied to different spatial regions of unselected memory cells. Unselected cells closer to the selected cell receive a stronger bias (first bias condition) to prevent data changes, while unselected cells farther away receive a weaker bias (second bias condition) to reduce sneak currents. This local differentiation allows simultaneous optimization of both data integrity and power consumption.
Solution Approach 2:
The unselected memory cells are segmented into at least two groups based on their position relative to the selected cell. This segmentation enables the system to apply differentiated bias conditions: a first bias condition for cells in the first group (closer to selected) and a second bias condition for cells in the second group (farther from selected), thereby balancing data protection requirements with power consumption optimization.
Data Source
AI summary
A nonvolatile semiconductor memory device according to an embodiment comprises: a memory cell array including first lines, second lines, and memory cells provided at each of intersections of the first lines and the second lines; and a control unit including a row control circuit, a first column control circuit provided on a side of one ends of the second lines, and a second column control circuit provided on a side of the other ends of the second lines, the control unit, during an access operation, controlling a potential of the first lines and the second lines such that a bias, which is lower than that applied to a certain unselected memory cell, is applied to those of unselected memory cells that are located more toward a center of the memory cell array in the column direction than the certain unselected memory cell.