Non-Volatile Memory Charge Trapping Layer Thermal Stability
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Solution Overview
Problem
Conventional non-volatile memory devices experience charge diffusion issues due to thermal stress, leading to decreased threshold voltage and data reliability when subjected to high temperatures during programming and erasing operations.
Innovation Solution
A non-volatile memory device design featuring field insulating layer patterns, a tunnel insulating layer, a charge trapping layer, and blocking layers with extensions that are thinner than the main layers, formed using physical vapor deposition and sputtering processes, to prevent charge diffusion by isolating the charge trapping layer from adjacent insulating layers through isotropic etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If thermal stress is applied to the charge trapping layer during programming/erasing operations, then data input/output operations can be performed, but lateral diffusion of electrons occurs causing threshold voltage decrease and deteriorated thermal stress characteristics
Solution Approach 1:
The device is divided into separate functional regions: the charge trapping layer is segmented from the tunnel oxide layer by introducing a blocking layer (Al2O3) between them. This segmentation prevents electron diffusion from the charge trapping layer to the tunnel oxide layer during thermal stress, while still allowing the charge trapping layer to perform its data storage function.
Solution Approach 2:
A blocking layer (Al2O3) is introduced as an intermediary layer between the charge trapping layer and the tunnel oxide layer. This intermediary prevents direct interaction between electrons in the charge trapping layer and the tunnel oxide layer, thereby preventing lateral diffusion and threshold voltage degradation during thermal stress conditions.
2Temperature
If the non-volatile memory device is heated at high temperature for extended periods, then thermal processing can be performed, but threshold voltage decreases substantially due to charge diffusion
Solution Approach 1:
The blocking layer (Al2O3) serves as a thermal and electrical intermediary that allows the device to withstand high temperature processing while preventing charge diffusion. During thermal processing, the blocking layer maintains structural integrity and prevents electrons from migrating laterally, thus preserving threshold voltage stability even at elevated temperatures.
Solution Approach 2:
The memory device employs a composite structure with multiple materials having different properties: the charge trapping layer (for charge storage), the blocking layer (Al2O3, for preventing diffusion), and the tunnel oxide layer (for tunneling). This composite material approach allows the device to simultaneously achieve charge storage capability, thermal stability, and threshold voltage retention during high-temperature processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses lateral charge diffusion, enhancing thermal stress characteristics and data reliability of the non-volatile memory device by maintaining the threshold voltage and preventing data loss during thermal stress conditions.
Implementation Method 1
formed using physical vapor deposition and sputtering processes
Implementation Method 2
formed using physical vapor deposition and sputtering processes
Implementation Method 3
isolating the charge trapping layer from adjacent insulating layers through isotropic etching
Data Source
AI summary
A non-volatile memory device includes field insulating layer patterns on a substrate to define an active region of the substrate, upper portions of the field insulating layer patterns protruding above an upper surface of the substrate, a tunnel insulating layer on the active region, a charge trapping layer on the tunnel insulating layer, a blocking layer on the charge trapping layer, first insulating layers on upper surfaces of the field insulating layer patterns, and a word line structure on the blocking layer and first insulating layers.