Non-volatile Memory Blocks with Variable Signal Lines
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Solution Overview
Problem
Existing semiconductor storage devices face challenges in enhancing data holding characteristics and reliability due to disturbances and inefficient use of memory cells, particularly in stacked memory configurations where block sizes and word line connections can lead to unreliable data storage.
Innovation Solution
A non-volatile semiconductor storage device with blocks of different sizes and a memory system where memory cells with excellent data holding characteristics are selectively used, and word lines are connected in a comb-teeth shape to reduce signal lines, minimizing the influence of disturbances and optimizing data storage by using common connections for non-use memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are stacked in a three-dimensional configuration, then storage capacity increases at low cost, but data holding characteristics and reliability deteriorate due to disturbances
Solution Approach 1:
The memory cell array is divided into multiple blocks, where each block contains memory cells with different data holding characteristics. This segmentation allows the system to selectively use blocks with better characteristics for data storage, thereby improving reliability while maintaining high storage capacity through the stacked three-dimensional configuration.
Solution Approach 2:
Different blocks within the stacked memory structure are assigned different functions based on their local characteristics. Blocks with excellent data holding characteristics are designated for data storage, while blocks with poorer characteristics are used for non-data purposes. This local quality differentiation resolves the contradiction by ensuring that only the most reliable memory cells are used for critical data storage.
2Reliability
If block size is reduced to minimize disturbance influence, then data reliability improves, but the number of signal lines and device complexity increase
Solution Approach 1:
Multiple word lines are connected in common to a single signal line, reducing the total number of signal lines required. This merging is applied specifically to blocks where memory cells do not store data, allowing the system to maintain small block sizes for reliability while reducing device complexity through shared connections.
Solution Approach 2:
Signal lines are designed to serve multiple functions by being shared across different blocks and word lines. This multi-functionality reduces the overall signal line width and device complexity while maintaining the ability to access and control individual memory cells with excellent data holding characteristics.
3Productivity
If all memory cells are used for data storage, then storage efficiency maximizes, but disturbances from non-use memory cells affect data reliability
Solution Approach 1:
Blocks with poor data holding characteristics are extracted from the data storage function and designated for non-data uses. This extraction eliminates the source of disturbances that would otherwise affect data reliability, while the remaining blocks with excellent characteristics are dedicated to reliable data storage, achieving both high storage efficiency and reliability.
Solution Approach 2:
Memory cells with poor data holding characteristics, which would normally be harmful sources of disturbance, are converted into a beneficial configuration by assigning them to non-data blocks. This conversion allows the system to utilize all memory cells for storage capacity while isolating the problematic cells from data storage functions, thereby transforming a potential harm into a benefit for overall system reliability.
4Device complexity
If word lines are connected in common to reduce signal lines, then device complexity decreases, but disturbance influence on individual memory cells increases
Solution Approach 1:
The memory cell array is segmented into multiple blocks with different characteristics. Word line common connections are implemented specifically in blocks where memory cells do not store data, isolating the disturbance effects to non-critical areas. This segmentation allows the system to reduce device complexity through common connections while protecting data storage blocks from disturbance influences.
Solution Approach 2:
Different connection strategies are applied to different blocks based on their local quality. Blocks with excellent data holding characteristics use individual word line connections to minimize disturbance influence, while blocks with poorer characteristics use common connections to reduce device complexity. This local differentiation resolves the contradiction by applying the appropriate connection strategy to each block's specific requirements.
Data Source
AI summary
A non-volatile semiconductor storage device includes an memory cell array including first and second blocks, each of which includes a plurality of memory strings each having n (n: natural number) memory cells, and a optionally a peripheral circuit for controlling the memory cell array. In this non-volatile semiconductor storage device, n signal lines are arranged in the first block, and m (n>m, m: natural number) signal lines are arranged in the second block, such that the second block size is smaller than the first block size.