Nonvolatile Memory Circuit Boot-Up Data Transfer

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Solution Overview

Problem

Conventional memory devices face inefficiencies in boot-up operations due to the time required to retrieve data from nonvolatile memory circuits, which hinders prompt repair and setting operations, as data transmission from these circuits to latch circuits is not quick enough for immediate device functionality.

Innovation Solution

Incorporating a nonvolatile memory circuit, a data bus, a shift register, and latch circuits that sequentially activate selection signals in response to a clock, allowing for efficient data transfer and storage during the boot-up process, enabling rapid transmission and utilization of repair and setting information for memory bank operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If data is stored in a nonvolatile memory circuit for repair information, then the data can be retained without power, but the data transmission speed to latch circuits is slow

Engineering Contradiction:
Improvedata retentionVSAvoiddata transmission speed
Core Design Contradiction:
Stability of the object's compositionVSSpeed

Solution Approach 1:

The nonvolatile memory circuit is divided into multiple banks (first bank, second bank, third bank, fourth bank) that can operate independently and simultaneously. This segmentation allows parallel data transmission to multiple latch circuits, significantly increasing the overall data transmission speed while maintaining the nonvolatile storage capability for data retention.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Repair information is pre-loaded into the nonvolatile memory circuit during manufacturing or initialization. The data is organized and staged in the memory banks in advance, so that when a repair operation is needed, the data is already positioned and ready for rapid transmission to the appropriate latch circuits without requiring real-time processing or conversion.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conventional fuse circuits are used for storing repair addresses, then the implementation is simple, but the pitch limitations prevent small area design

Engineering Contradiction:
Improveimplementation simplicityVSAvoidcircuit area
Core Design Contradiction:
Ease of manufactureVSArea of moving object

Solution Approach 1:

The patent replaces the physical laser fuse cutting mechanism with an electrical/nonvolatile memory-based storage system. Instead of using physical fuse links that require laser cutting and have fixed pitch requirements, the repair information is stored electronically in nonvolatile memory circuits, allowing for much smaller area utilization while maintaining the same functionality of storing and retrieving repair addresses.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If laser fuses are used for storing repair information, then the programming is done at wafer state, but programming after package mounting is not possible

Engineering Contradiction:
Improvewafer-state programmingVSAvoidpost-package programming capability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent changes the fundamental parameter of how repair information is programmed and stored. Instead of using irreversible physical fuse cutting that must be done at wafer state, the system uses reprogrammable nonvolatile memory circuits that can be programmed at wafer state and then reprogrammed or accessed after package mounting. This parameter change from physical to electrical storage enables both wafer-state programming and post-package programming capabilities.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9336839B2Integrated circuit and memory device
Publication Date: 2016.05.10 SK HYNIX INC
  • US9336839B2 patent drawing
  • US9336839B2 patent drawing
  • US9336839B2 patent drawing

AI summary

An integrated circuit may include a nonvolatile memory circuit, a data bus suitable for transferring data outputted from the nonvolatile memory circuit, a shift register suitable for sequentially activating first to Nth selection signals whenever a clock is activated, and first to Nth latch circuits corresponding to the first to Nth selection signals, respectively, and suitable for storing data of the data bus in response to activation of one or more of the first to Nth selection signals.