Nonvolatile Memory Cell Dual-Stage Programming for Write Speed
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Solution Overview
Problem
Nonvolatile memory devices, such as flash memories, are slow in write operations, which prolongs the time required to program data, despite being fast in read operations and non-volatile, thus inefficient in data storage and retrieval.
Innovation Solution
A method and structure for a nonvolatile memory cell with a buried isolation layer, a source and drain, and a gate stack structure comprising a tunneling insulating layer, a second data storage layer, and a blocking insulating layer, allowing for pre-programming using a first program voltage and background-programming using a higher second program voltage, enhancing write operation speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flash memory is used for nonvolatile storage, then data retention without power is achieved, but write operation speed is slow
Solution Approach 1:
The memory cell is divided into two separate data storage layers: a first data storage layer for high-speed pre-programming and a second data storage layer for nonvolatile background-programming. This segmentation allows each layer to serve its specific function optimally, resolving the contradiction between speed and retention.
Solution Approach 2:
The first data storage layer performs preliminary programming at high speed using a first program voltage, preparing data before the final nonvolatile storage step. This preliminary action enables fast initial data placement while the second layer handles the retention-ensuring background programming.
2Speed
If high program voltage is applied for fast programming, then write speed improves, but data retention capability deteriorates
Solution Approach 1:
Different program voltages are applied to different storage layers: a first program voltage for the first data storage layer and a second program voltage (higher than the first) for the second data storage layer. Each layer receives the appropriate voltage quality for its specific function, allowing both fast programming and reliable retention.
Solution Approach 2:
The programming process dynamically switches between two voltage levels: the first program voltage for initial fast programming and the second program voltage for final nonvolatile storage. This dynamic voltage adjustment allows the system to optimize both speed and retention at different stages of the programming process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables high-speed pre-programming similar to 1T DRAM and background-programming akin to flash memory, improving write operation efficiency while maintaining non-volatility, reducing the time needed for data storage and retrieval.
Implementation Method 1
The first data storage layer may generate holes due to ion ionization using the first program voltage, and store the generated holes
Implementation Method 2
The second data storage layer may store the data stored in the first data storage layer through channel hot electron injection or FN tunneling using the second program voltage
Data Source
AI summary
A method of programming a nonvolatile memory device. The method may include pre-programming one memory cell among a plurality of memory cells by storing data in a first data storage layer using a first program voltage applied to one word line corresponding to the one memory cell among the plurality of memory cells; and while pre-programming other memory cells among the plurality of memory cells, background-programming the pre-programmed memory cell by moving the stored data to a second data storage layer using a second program voltage that is higher than the first program voltage applied to the word line of the pre-programmed memory cell.