Non-Volatile Memory Cell Grouping to Reduce Random Telegraph Noise

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Solution Overview

Problem

Non-volatile memory devices, particularly those operating in analog or multilevel cell modes, are susceptible to random telegraph noise (RTN) due to electron capture and emission by oxide traps, leading to read current instability and inaccurate data storage.

Innovation Solution

Memory cells are logically grouped into cell groups, with the cell exhibiting the lowest RTN used for data storage, and others deeply programmed to prevent contribution to read operations, thereby reducing RTN effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are operated in analog or multilevel cell modes to increase storage capacity, then memory density is improved, but random telegraph noise causes read current instability and reduces reliability

Engineering Contradiction:
Improvememory densityVSAvoidread current stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The memory array is divided into multiple blocks, with each block containing multiple memory cells. This segmentation allows the system to identify and isolate cells exhibiting RTN while maintaining operational cells within the same array, thus preserving memory density while improving read reliability through selective block management

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically adjusts read voltages and thresholds based on measured RTN characteristics of each memory block. By changing operational parameters (voltages, thresholds) according to the noise characteristics of different blocks, the system maintains reliable reading in low-noise blocks while managing or excluding high-noise blocks, thereby resolving the contradiction between high-density operation and read stability

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple read operations are performed to detect RTN and screen defective cells, then reliability is improved, but read time increases

Engineering Contradiction:
Improvedefective cell identification accuracyVSAvoidread time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary RTN characterization during manufacturing or initial operation by conducting multiple read operations on all memory blocks. This preliminary action identifies high-RTN blocks in advance, allowing the system to create a permanent map of defective blocks that can be excluded from future operations, thus achieving reliable defective cell identification without repeating time-consuming measurements during normal operation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Once RTN characteristics are established through preliminary measurement, the system skips redundant read operations on known high-RTN blocks during normal operation. By rushing through or excluding already-characterized defective blocks, the system avoids unnecessary read time while maintaining reliability through the preliminary identification phase

Inventive Principle:
Principle #21Skipping (Rushing through)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses RTN, enhances read accuracy, and maintains memory density by optimizing programming states for less noisy cells, allowing more precise data retrieval.

Implementation Method 1

random telegraph noise (RTN) due to electron capture and emission by oxide traps

Methodology Applied
Scientific EffectElectron capture and emission: Absorption (physical)

Data Source

PatentEP4352728B1Method of reducing random telegraph noise in non-volatile memory by grouping and screening memory cells
Publication Date: 2025.07.23 SILICON STORAGE TECHNOLOGY INC
  • EP4352728B1 patent drawingFigure 1
  • EP4352728B1 patent drawingFigure 2
  • EP4352728B1 patent drawingFigure 3

AI summary

A method of programming a memory device having a plurality of memory cell groups where each of the memory cell group includes N non-volatile memory cells, where N is an integer greater than or equal to 2. For each memory cell group, the method includes programming each of the non-volatile memory cells in the memory cell group to a particular program state, performing multiple read operations on each of the non-volatile memory cells in the memory cell group, identifying one of the non-volatile memory cells in the memory cell group that exhibits a lowest read variance during the multiple read operations, deeply programming all of the non-volatile memory cells in the memory cell group except the identified non-volatile memory cell, and programming the identified non-volatile memory cell in the memory cell group with user data.