Non-Volatile Memory Cell Multi-Time Programming via Threshold Voltage Modulation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing one-time programmable (OTP) memory devices lack the ability to perform multiple programming and erasing operations, leading to increased silicon real estate and overhead costs, and do not effectively manage data state changes, which can result in security issues and data breaches.
Innovation Solution
A programmable non-volatile device with a floating gate and control gate that utilizes varying threshold voltages to store and retrieve data, allowing for multiple programming and pseudo-erasing operations without the need for additional circuitry, enabling multi-time programmable functionality within a single array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If OTP memory devices are used for multiple programming operations, then data storage capability is improved, but device complexity increases due to need for additional circuitry
Solution Approach 1:
The patent applies parameter changes by varying the threshold voltage levels across different programming cycles. Instead of using additional circuitry, the invention changes the electrical parameters (threshold voltages Vt1, Vt2, Vt3) to enable multiple programming operations. The controller adjusts read voltages and programming voltages dynamically based on the current programming cycle, allowing the same physical cell to be reprogrammed multiple times without adding complexity.
2Adaptability or versatility
If separate OTP arrays are used for each programming cycle, then reprogrammability is achieved, but silicon real estate increases
Solution Approach 1:
The patent implements universality by making a single OTP array perform multiple programming cycles through dynamic adjustment of voltage parameters. The same memory cells are reused across multiple programming operations by changing the threshold voltage reference levels. This eliminates the need for separate redundant arrays for each programming cycle, significantly reducing silicon real estate while maintaining multi-time programmable capability.
3Ease of operation
If traditional erase operations are implemented, then data state management is improved, but manufacturing complexity increases due to opposite polarity voltage requirements
Solution Approach 1:
The patent inverts the traditional approach by eliminating the need for separate erase operations with opposite polarity voltages. Instead of erasing data to a fixed initial state, the invention programs data relative to dynamically changing threshold voltage levels. What would traditionally require an erase operation is achieved by simply adjusting the reference threshold voltage and re-programming, thereby simplifying the voltage requirements and reducing manufacturing complexity.
4Reliability
If threshold voltage levels are increased for re-programming, then data security is improved by resetting to common state, but energy consumption increases
Solution Approach 1:
The patent applies periodic action by implementing a structured multi-cycle programming approach where threshold voltages are systematically adjusted in discrete steps across programming cycles. The controller periodically resets the reference threshold voltage levels and re-programs cells in a controlled sequence. This periodic restructuring ensures data security by maintaining a common reference state while optimizing energy consumption through efficient voltage transition management rather than continuous high-energy operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for efficient reprogrammability without the overhead of separate erase operations, maintaining low cost and silicon efficiency while ensuring data security by resetting all cells to a common state, effectively emulating multi-time programmable capabilities in a one-time programmable device.
Implementation Method 1
a floating gate adapted to store a first charge amount corresponding to the first programmed state in response to the first voltage value being applied at a first programming time, and adapted to store a second charge amount that also corresponds to the first programmed state in response to a second voltage value being applied at a second programming time
Implementation Method 2
The injection mechanism for programming can either be channel hot electron injection or Fowler-Nordheim electron tunneling
Implementation Method 3
The injection mechanism for programming can either be channel hot electron injection or Fowler-Nordheim electron tunneling
Implementation Method 4
programmed to a first state at both a first threshold voltage, Vt1, and a second different threshold voltage, Vt2... programmed to a second state at both a first threshold voltage, Vt1, and the second different threshold voltage, Vt2
Data Source
AI summary
An array of programmable non-volatile devices, such as a nominal OTP cell, is adapted such that a Vt representing a particular binary logic state can be changed over time. This allows for re-programming and emulating a few times or multi-time programmable device.