Nonvolatile Memory Data Scanner Selective Programming
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Solution Overview
Problem
Current nonvolatile memory devices face inefficiencies in programming operations, particularly in handling multiple data states and bit-level programming, which affects speed and integration capabilities.
Innovation Solution
A nonvolatile memory device with a memory cell array, data input/output buffer, and a data scanner that selectively performs scan operations based on address information, using control logic to align and program data according to distinguished program states, and a write driver for simultaneous programming of multiple bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If data scan operation is performed for all data in the buffer, then programming accuracy is improved, but programming time increases
Solution Approach 1:
The patent applies partial action by performing data scan operations selectively only on portions of the buffer that contain valid data requiring programming. The control logic identifies which buffer portions contain valid data and restricts scan operations to those specific regions, rather than scanning the entire buffer. This reduces unnecessary scanning time while maintaining programming accuracy for the actual data being programmed.
Solution Approach 2:
The patent uses preliminary action by having the control logic pre-identify and mark valid data regions in the buffer before initiating the scan operation. The address detector and control logic determine in advance which portions of the buffer contain valid data that needs scanning, allowing the scan unit to efficiently target only those regions without wasting time on empty or already-programmed areas.
2Productivity
If multiple memory cells are programmed simultaneously, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the buffer into multiple scan units, each capable of independently scanning and preparing data for programming. The control logic manages multiple scan units that can operate in parallel, with each scan unit handling a specific portion of the buffer. This segmentation allows simultaneous programming of multiple memory cells while distributing the control complexity across multiple simpler, independent scan units rather than requiring one complex controller.
Solution Approach 2:
The patent uses dynamics by enabling the scan units to be dynamically activated or deactivated based on the programming requirements. The control logic can selectively enable certain scan units for simultaneous operation depending on the data pattern and programming needs, allowing flexible parallel programming without permanently increasing hardware complexity for all possible scenarios.
3Productivity
If data is aligned according to program states, then programming efficiency is improved, but control complexity increases
Solution Approach 1:
The patent applies local quality by having different scan units or buffer portions optimized for different program states. The control logic identifies the program state of each data portion and directs it to the appropriate scan unit or processing path. This allows efficient handling of multiple program states without requiring a single complex control mechanism, as each local unit can be simpler and specialized for its specific function.
Data Source
AI summary
A nonvolatile memory device includes a memory cell array having multiple memory cells, a data input/output buffer for temporarily storing data to be stored in the memory cells, and a data scanner for scanning the data stored temporarily in the data input/output buffer. The nonvolatile memory device further includes control logic for reading address information of a memory cell in which at least a portion of the data is to be stored and selectively performing a data scan operation according to the read address information.