Non-volatile Memory Erase Detect and Undererased Cell Counting

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Solution Overview

Problem

Non-volatile memory devices face challenges in detecting and repairing defective word lines, leading to inefficiencies in erase and program operations due to abnormal threshold voltage distributions and increased program/erase cycles, which can result in read errors and prolonged verification times.

Innovation Solution

The proposed solution involves an operating method for a non-volatile memory device that applies an erase detect voltage to a selected word line, counts undererased cells, and determines if the word line is defective based on a reference bit count, allowing for fail block processing and continued program operations on healthy lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional erase detect methods are used without counting undererased cells, then the process is simpler, but defective word lines cannot be accurately identified leading to read errors

Engineering Contradiction:

Improveaccuracy of defective word line detectionVSAvoidcomplexity of erase detect process

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces complex qualitative judgment of erase status with a quantitative counting mechanism. Instead of using complicated methods to determine if a word line is defective, the system counts the number of undererased cells (comparing against a reference bit count) to objectively identify defective word lines, substituting mechanical/judgmental processes with automated counting logic.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements feedback by counting undererased cells and comparing the count against a reference bit count to determine whether a word line is defective. This feedback mechanism allows the system to adjust its operation based on the detected status, improving reliability by continuously monitoring and responding to erase operation outcomes.

Inventive Principle:

Principle #23Feedback

2Reliability

If all word lines are verified through complete program operations, then reliability is maintained, but verification time increases significantly

Engineering Contradiction:

Improveprogram operation reliabilityVSAvoidverification time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary erase detect operations on word lines before committing to complete program operations. By counting undererased cells in advance, the system identifies potentially defective word lines early, allowing it to avoid time-consuming program operations on lines that are likely to fail, thus reducing overall verification time while maintaining reliability.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

Instead of performing complete program operations on all word lines, the patent applies partial verification through erase detect and undererased cell counting. This partial action is sufficient to identify defective word lines without the excessive time cost of full program operations on every line, optimizing the balance between reliability and speed.

Inventive Principle:

Principle #16Partial or excessive action

3Productivity

If program operations are performed on defective word lines, then data storage capacity is maximized, but read errors increase

Engineering Contradiction:

Improvedata storage capacity utilizationVSAvoidread operation accuracy

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by performing erase detect operations and counting undererased cells before program operations. This early detection prevents the system from performing program operations on defective word lines that would lead to read errors, thereby protecting data storage reliability while still maximizing capacity by utilizing only healthy word lines.

Inventive Principle:

Principle #9Preliminary anti-action

4Manufacturing precision

If multiple program/erase cycles are performed to ensure proper erasing, then erase completeness is improved, but the number of cycles increases leading to longer operation times

Engineering Contradiction:

Improveerase operation completenessVSAvoidprogram/erase cycle efficiency

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent substitutes multiple iterative program/erase cycles with a single erase detect operation followed by undererased cell counting. This replacement eliminates the need for repeated cycles to verify erase completeness, achieving the same level of precision in determining erase status while dramatically improving cycle efficiency and reducing operation times.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11158381B2Non-volatile memory device and operating method thereof

Publication Date: 2021.10.26 SAMSUNG ELECTRONICS CO LTD

AI summary

An operating method of a non-volatile memory device including a plurality of memory cells respectively connected to a plurality of word lines is provided. The operating method includes applying an erase detect voltage to a selected word line of the plurality of word lines to perform an erase detect operation on memory cells connected to the selected word line in response to a program command, applying a program voltage to the selected word line after the erase detect operation, and counting a number of undererased cells of the memory cells on which the erase detect operation has been performed.