Nonvolatile Memory Erase Control to Prevent Open-Block Over-Erasure

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Nonvolatile memory devices face issues with memory cells being over-erased during erase operations, leading to degraded retention characteristics due to shifts in threshold voltage distributions.

Innovation Solution

A method is introduced where a higher pre-program voltage level is applied to open blocks with erased word-lines during the pre-program period of an erase loop, preventing over-erasure and maintaining optimal threshold voltage distributions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a standard pre-program voltage level is applied to all blocks during erase operations, then the erase operation can be performed uniformly, but memory cells in open blocks with erased word-lines become over-erased leading to degraded retention characteristics

Engineering Contradiction:
Improveerase operation speedVSAvoidretention characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies different pre-program voltage levels to different types of blocks during the erase operation. Specifically, open blocks with erased word-lines receive a first pre-program voltage level, while other blocks receive a second pre-program voltage level. This local differentiation prevents over-erasure in vulnerable blocks while maintaining erase efficiency across the entire memory device, thereby resolving the contradiction between erase speed and retention characteristics.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent performs a pre-program operation before the actual erase operation to prepare the memory blocks. By applying appropriate pre-program voltage levels in advance, the patent ensures that blocks are in the optimal state for subsequent erase operations, preventing over-erasure and maintaining reliable retention characteristics while enabling efficient erase operations.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If repeated erase operations are performed on open blocks, then the memory can be fully erased, but the threshold voltage distribution shifts leading to over-erasure and degraded characteristics

Engineering Contradiction:
Improveerase completenessVSAvoidthreshold voltage distribution
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent differentiates between open blocks and other blocks by applying distinct pre-program voltage levels. Open blocks with erased word-lines receive a conservative first voltage level that prevents threshold voltage distribution shifts, while other blocks receive a more aggressive second voltage level to ensure complete erasure. This local quality approach enables repeated erase operations without degrading threshold voltage precision.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The pre-program operation serves as a preliminary action that prepares blocks for erase operations by setting appropriate voltage levels in advance. This preliminary step prevents over-erasure during repeated erase operations by establishing proper threshold voltage distributions before the actual erase process begins, ensuring both erase completeness and voltage distribution precision.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250218521A1Nonvolatile memory device and method of operating a nonvolatile memory device
Publication Date: 2025.07.03 SAMSUNG ELECTRONICS CO LTD
  • US20250218521A1 patent drawing
  • US20250218521A1 patent drawing
  • US20250218521A1 patent drawing

AI summary

In an example method of operating a nonvolatile memory device, an erase command and a block address designating a target memory block from a plurality of memory blocks are received. Whether the target memory block is an open block including at least one erased word-line is determined based on the erase command and the block address. A pre-program voltage having a first voltage level is applied to word-lines of the target memory block during pre-program period of a erase loop based on the target memory block being a closed block including only programmed word-lines. A pre-program voltage having a second voltage level greater than the first voltage level is applied to a portion of a region, including the at least one erased word-line, of the target memory block during the pre-program period based on the target memory block being the open block.