Nonvolatile Memory Interface Training for Activation Speed

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Solution Overview

Problem

Existing memory systems face challenges in efficiently setting optimal communication parameters between memory controllers and NAND packages, leading to longer activation times and potential errors due to increased storage capacity and varying environmental conditions.

Innovation Solution

The memory system performs an interface training operation during the test phase, storing results in a nonvolatile manner, allowing for immediate application in the actual operation phase, and adaptively adjusts parameters based on temperature, voltage, or frequency changes to ensure optimal communication characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If interface training operation is performed during actual operation phase, then communication reliability is improved, but system activation time increases

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidsystem activation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The interface training operation is executed in advance during the test phase before the memory system is shipped. The training results including optimal communication parameters are stored in nonvolatile memory. During actual operation, the system directly applies these pre-determined parameters without repeating the training process, thus eliminating activation time penalty while maintaining communication reliability.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If communication parameters are fixed, then system complexity is reduced, but adaptability to environmental changes deteriorates

Engineering Contradiction:
Improvesystem complexityVSAvoidadaptability to environmental changes
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The system dynamically adapts to environmental changes by monitoring temperature, voltage, and frequency conditions. When environmental parameters fall outside predetermined ranges, the system automatically adjusts communication parameters by executing interface training operations and applying updated results from nonvolatile memory, ensuring optimal communication under varying conditions without requiring complex real-time control mechanisms.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements a feedback mechanism where environmental conditions (temperature, voltage, frequency) are continuously monitored. Based on this feedback, the control circuit determines whether communication parameters need adjustment and triggers appropriate interface training operations to optimize communication, creating a closed-loop system that adapts to environmental changes.

Inventive Principle:
Principle #23Feedback

3Reliability

If interface training is repeated in actual operation phase, then communication optimization is improved, but productivity deteriorates

Engineering Contradiction:
Improvecommunication optimizationVSAvoidsystem activation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The interface training operation is performed in advance during the test phase, and the optimal communication parameters are stored in nonvolatile memory. During actual operation, the system directly applies these pre-determined parameters without repeating the training process, thus eliminating activation time penalty while maintaining communication reliability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10916276B2Nonvolatile memory and memory system
Publication Date: 2021.02.09 KIOXIA CORP
  • US10916276B2 patent drawing
  • US10916276B2 patent drawing
  • US10916276B2 patent drawing

AI summary

According to one embodiment, a nonvolatile memory includes a memory cell array including a first storage region and a second storage region, an input/output circuit configured to communicate with a memory controller, and a control circuit. The control circuit is configured to, upon receiving a first command from the memory controller, execute a first training operation related to the input/output circuit, and upon receiving a second command from the memory controller, store a first result of the first training operation in the first storage region.