Nonvolatile Memory Manufacturing via Standard Logic Process Integration
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Solution Overview
Problem
Current manufacturing processes for nonvolatile memory devices are complex and costly due to separate processing steps for storage cells and logic devices, requiring numerous photomasks and increasing costs while reducing competitiveness.
Innovation Solution
A method that integrates the manufacturing of nonvolatile memory into the standard logic process by forming a gate oxide layer and using polysilicon deposition and etching processes to create stacked capacitors and transistors, simplifying the process and enhancing compatibility with logic devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If separate processing steps are used for storage cells and logic devices, then manufacturing precision can be maintained, but device complexity and manufacturing cost increase significantly
Solution Approach 1:
The patent merges the storage cell fabrication process with the logic device fabrication process into a unified flow. Both types of devices are formed simultaneously using the same photomasks and processing steps, eliminating the need for separate processing sequences. This integration maintains manufacturing precision while significantly reducing process complexity and the number of required photomasks.
Solution Approach 2:
The patent creates a universal fabrication process that can produce both storage cells and logic devices using the same equipment, materials, and processing parameters. The methodology allows a single set of photomasks to define patterns for both device types, making the manufacturing system multi-functional and reducing overall complexity.
2Manufacturing precision
If numerous photomasks are added for separate memory processing, then manufacturing precision can be maintained, but manufacturing cost increases
Solution Approach 1:
The patent combines the photomask requirements for storage cells and logic devices into a single set of masks. By designing the photomasks to define patterns for both device types simultaneously, the patent eliminates the need for additional specialized masks, thereby reducing manufacturing cost while preserving pattern definition accuracy through unified alignment procedures.
Solution Approach 2:
The patent develops universal photomasks that serve dual purposes: defining logic device patterns and storage cell patterns in the same exposure step. This multi-functional approach to photomask design reduces the total number of masks required, lowering material costs and simplifying the manufacturing workflow while maintaining the precision needed for both device types.
3Reliability
If separate manufacturing processes are used for memory and logic devices, then device performance can be optimized, but productivity decreases
Solution Approach 1:
The patent merges the fabrication sequences for storage cells and logic devices into a single integrated process flow. Both device types progress through identical processing steps simultaneously, doubling the utilization of manufacturing equipment and increasing throughput. This merged approach maintains device performance by ensuring both devices receive identical process conditions while significantly improving manufacturing productivity.
Solution Approach 2:
The patent enables continuous processing where the same equipment and process steps are used continuously for both device types without interruption or reconfiguration. The unified fabrication flow allows materials, equipment, and process parameters to remain in a constant state of useful action, eliminating idle time and maximizing equipment utilization, thereby increasing overall manufacturing throughput while maintaining device quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces costs, and improves compatibility between memory and logic devices by using standard logic processes to produce memory devices concurrently with logic devices, thereby reducing complexity and enhancing integration.
Implementation Method 1
forming a gate oxide layer on a substrate
Implementation Method 2
forming a stacked capacitor of a storage cell after making a logic gate polysilicon undertake at least two deposition processes
Data Source
AI summary
The present invention relates to a method for manufacturing a nonvolatile memory, including the steps of: forming a gate oxide layer on a substrate; forming a stacked capacitor of a storage cell after making a logic gate polysilicon undertake at least two deposition processes; and removing the extra logic gate polysilicon by an etching process to form a storage transistor and a peripheral logic transistor. According to the method of the present invention, the stacked capacitor of the storage transistor is formed by depositing at least twice, and the memory is manufactured in a standard logic process, which makes the manufacturing process of the memory simpler, the memory has good compatibility with the logic process and has low cost.