Non-volatile Memory Device Multi-Page Programming Control Logic
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Solution Overview
Problem
Current semiconductor memory devices face challenges in efficiently programming multi-bit data in high-density memory cells, particularly in three-dimensional array structures, where existing methods lack effective control over selection lines and bit lines to optimize programming efficiency.
Innovation Solution
A method and device architecture that activates all or part of the selection lines in a column simultaneously, drives bit lines with a program voltage, and repeats this process until all bit lines are driven, utilizing a control logic to manage row and column decoders and selection transistors to program and verify memory cells in a non-volatile memory device with a vertical string structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If selection lines are activated sequentially in conventional memory programming, then control simplicity is maintained, but programming speed decreases
Solution Approach 1:
The patent implements dynamic control of selection lines where the number of simultaneously activated selection lines varies based on programming conditions. The control logic circuit dynamically adjusts which selection lines are activated together, allowing flexible optimization between speed and control complexity for different programming scenarios.
Solution Approach 2:
The patent segments the column selection into multiple independently controllable selection lines (e.g., first selection line, second selection line). By segmenting the selection process, the system can activate specific segments simultaneously to increase programming speed while maintaining manageable control through the control logic circuit.
2Productivity
If multiple selection lines are activated simultaneously to increase programming speed, then programming efficiency improves, but control complexity increases
Solution Approach 1:
The control logic circuit serves multiple functions: it determines which selection lines to activate, controls the timing of activation, manages bit line voltages, and coordinates verify operations. This multi-functional design consolidates control complexity into a single versatile circuit rather than requiring separate control mechanisms for each function.
Solution Approach 2:
The control logic circuit prepares and pre-configures the activation states of multiple selection lines before simultaneously activating them. This preliminary preparation allows complex multi-line activation sequences to be managed systematically, reducing the perceived complexity during actual execution.
3Manufacturing precision
If conventional bit line driving is used, then device simplicity is maintained, but programming accuracy decreases
Solution Approach 1:
The patent applies different voltage conditions to different bit lines based on local programming requirements. The control logic circuit determines which bit lines receive program voltages and which remain at reference voltages, allowing precise local control of programming accuracy without requiring complex modifications to the overall device structure.
Data Source
AI summary
A method of programming a non-volatile memory device including a plurality of strings arranged in rows and columns comprises activating all or a part of selection lines in one column at the same time depending upon data to be programmed, driving a bit line corresponding to the one column with a bit line program voltage, and repeating the activating and the driving until bit lines corresponding to the columns are all driven.