Nonvolatile Memory Multi-Read Command Architecture
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Solution Overview
Problem
Current nonvolatile memory devices require multiple read commands for accessing multiple target pages, leading to increased processing time and power consumption due to repeated voltage setting and command transmission.
Innovation Solution
Implementing a multi-read operation that allows a single multi-read command to access multiple target pages by sequentially applying a read voltage of a first level to target word lines, eliminating the need for repeated voltage setting and command transmission, and using a pass voltage for adjacent word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple read commands are used to access multiple target pages, then data can be retrieved from multiple pages, but processing time and power consumption increase due to repeated voltage setting and command transmission
Solution Approach 1:
The patent combines multiple read operations into a single multi-read command that can access multiple target pages simultaneously. The decoder is configured to sequentially apply read voltage to multiple target word lines in parallel, and the read circuit senses bit lines for all target pages concurrently, merging what would traditionally require multiple sequential read commands into one unified operation.
Solution Approach 2:
The system performs preliminary voltage setting once for the multi-read command, and then maintains this voltage state while sequentially applying it to multiple target word lines. This preliminary action of setting the read voltage once eliminates the need for repeated voltage setting across multiple read commands, reducing processing time.
2Productivity
If multiple read commands are used to access multiple target pages, then data can be retrieved from multiple pages, but power consumption increases due to repeated voltage setting and command transmission
Solution Approach 1:
The patent combines multiple read operations into a single multi-read command that can access multiple target pages simultaneously. The decoder is configured to sequentially apply read voltage to multiple target word lines in parallel, and the read circuit senses bit lines for all target pages concurrently, merging what would traditionally require multiple sequential read commands into one unified operation.
Solution Approach 2:
The system performs preliminary voltage setting once for the multi-read command, and then maintains this voltage state while sequentially applying it to multiple target word lines. This preliminary action of setting the read voltage once eliminates the need for repeated voltage setting across multiple read commands, reducing processing time.
3Loss of time
If a single multi-read command is used to access multiple target pages, then processing time and power consumption are reduced, but the device complexity increases due to the need for sequential voltage application and sensing mechanisms
Solution Approach 1:
The patent segments the word lines into target word lines and non-target word lines, and segments the sensing process into sequential steps where read voltage is applied to one target word line at a time while the read circuit senses the corresponding bit line. This segmentation allows the complex multi-read operation to be broken down into manageable sequential steps that the decoder and read circuit can execute systematically.
Solution Approach 2:
The system performs preliminary voltage setting once for the multi-read command, and then maintains this voltage state while sequentially applying it to multiple target word lines. This preliminary action of setting the read voltage once eliminates the need for repeated voltage setting across multiple read commands, reducing processing time.
Data Source
AI summary
A nonvolatile memory device includes a plurality of memory cells coupled to a single bit line, wherein each of the plurality of memory cells is coupled to a different word line from a plurality of word lines. The nonvolatile memory device includes a decoder configured to sequentially apply a read voltage of a first level to target word lines among the word lines, based on a multi-read command. The nonvolatile memory device includes a read circuit configured to obtain first sensing values of target memory cells coupled to the target word lines, by sensing the bit line each time the read voltage of the first level is applied to each of the target word lines.


