Non-volatile Memory Heterogeneous Multi-Sensing Circuit
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Solution Overview
Problem
Non-volatile memory devices face challenges in accurately determining cell state information without deteriorating system performance, especially when memory cell deterioration is severe, leading to inefficiencies in error correction and read operations.
Innovation Solution
A non-volatile memory device with a heterogeneous multi-sensing circuit that performs sensing operations under different conditions for at least two threshold voltage distributions, providing cell state information to improve data reliability and optimize read levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a normal read operation is performed on deteriorated memory cells, then the read operation can be executed, but the data reliability deteriorates due to severe memory cell deterioration
Solution Approach 1:
The patent segments the sensing operation into multiple distinct sensing operations, each targeting different threshold voltage distributions. Instead of performing a single sensing operation that may fail on deteriorated cells, the system divides the sensing task into multiple specialized operations with different sensing conditions, increasing the likelihood of successfully reading data from deteriorated memory cells.
Solution Approach 2:
The patent dynamically adjusts sensing conditions based on memory cell health status. By monitoring cell state information and selecting appropriate sensing operations from multiple available operations, the system adapts to varying degrees of cell deterioration, applying different voltage levels and sensing parameters optimized for specific cell states.
2Reliability
If multiple sensing operations are performed to determine cell state information, then data reliability improves, but system performance deteriorates due to increased operation time
Solution Approach 1:
The patent performs preliminary sensing operations to determine cell state information before executing the main data reading operation. By预先 identifying the health status of memory cells and selecting appropriate sensing conditions in advance, the system avoids performing unnecessary multiple sensing operations during actual data access, thus maintaining high system performance while ensuring data reliability.
Solution Approach 2:
The system uses the same page buffer circuit for both sensing operations and data reading operations, eliminating the need for dedicated additional circuits. The page buffer circuit serves multiple functions including sensing cell states and latching read data, reducing hardware overhead and maintaining system performance while enabling multiple sensing operations.
3Measurement precision
If a heterogeneous multi-sensing circuit is implemented to perform sensing operations under different conditions, then cell state information accuracy improves, but device complexity increases
Solution Approach 1:
The patent designs the page buffer circuit to perform multiple functions: it serves as a sensing amplifier for detecting cell states, a latch for storing read data, and a selector for choosing between different sensing operations. This multi-functional design enables the system to perform sensing operations under different conditions without adding dedicated separate circuits for each function, thereby maintaining relatively simple device architecture while achieving high measurement precision.
4Reliability
If read retry operation is performed using different sensing techniques, then data reliability improves for deteriorated cells, but operation time increases
Solution Approach 1:
The patent performs cell state determination sensing operations in advance to identify deteriorated memory cells before executing the main data read operation. By预先 detecting cell health status and pre-selecting the most appropriate sensing operation, the system minimizes the need for iterative read retry operations, thereby reducing total operation time while maintaining high data reliability for deteriorated cells.
Data Source
AI summary
A non-volatile memory device includes a memory cell array including a plurality of memory blocks that includes a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a row decoder configured to select one among the plurality of memory blocks, based on an address, a voltage generator configured to apply word line voltages corresponding to selected word lines and unselected word lines, among the plurality of word lines, page buffers connected to the plurality of bit lines and configured to read data from a memory cell connected to one among the selected word lines of the selected one among the plurality of memory blocks, and a control logic configured to control the row decoder, the voltage generator, and the page buffers.