Nonvolatile Memory Neural Network Feedforward Recurrent Operations

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Solution Overview

Problem

Existing non-volatile memory devices face challenges in effectively performing feedforward and recurrent operations in artificial neural networks, particularly when dealing with a large number of memory cells, as current methods fail to accurately adjust or repair fail bits across a vast array of non-volatile memory cells.

Innovation Solution

Integration of a non-volatile memory array with necessary circuit units, including a decoder unit, bit line voltage regulating unit, word line voltage regulating unit, multiplexer, and current-to-voltage conversion unit, allows for the performance of feedforward and recurrent operations by applying different input voltages to non-volatile memory cells, collecting and converting output currents to voltages, and iteratively adjusting input voltage sets to ensure all errors are within a predetermined range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If simple peripheral circuit units are used to correct fail bits in non-volatile memory cells, then device complexity is reduced, but the ability to effectively adjust or repair fail bits deteriorates when the flash memory device comprises a huge number of nonvolatile memory cells

Engineering Contradiction:
Improvecircuit complexityVSAvoidfail bit correction capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The memory array is divided into multiple blocks, with each block containing a subset of memory cells. The circuit selectively activates only the relevant block during verification and correction operations, enabling effective management of large-scale memory arrays while maintaining circuit simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary verification of memory cells before final data storage. By pre-identifying fail bits through verification operations and applying corrections in advance, the system ensures reliable data storage without requiring complex real-time correction circuits.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If periodic constant pulse voltages are applied to correct fail bits, then data writing capability is maintained, but the correction effectiveness deteriorates when dealing with a huge number of nonvolatile memory cells

Engineering Contradiction:
Improvedata writing capabilityVSAvoidfail bit detection accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

Different voltage levels are applied to different blocks of memory cells based on their specific verification results. The circuit selectively applies higher voltage pulses only to blocks containing fail bits, while maintaining standard voltage for blocks without errors, thereby improving correction effectiveness without affecting overall data writing capability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The voltage pulse characteristics are dynamically adjusted based on the verification results. The system transitions from static periodic constant pulse voltages to dynamic voltage pulses with varying amplitudes and durations, optimized for the specific correction needs of each memory block.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If non-volatile memory cells are used to perform neural network operations, then storage capacity and unit-area storage capacity are improved, but the ability to accurately adjust or repair errors across vast arrays of memory cells deteriorates

Engineering Contradiction:
Improvestorage capacityVSAvoiderror correction accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The system implements a feedback mechanism where verification results from memory cell operations are fed back to the control circuit. Based on this feedback, the circuit dynamically adjusts verification parameters and applies targeted correction operations, enabling accurate error correction across large-scale memory arrays used for neural network computations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The vast memory array is segmented into manageable blocks for independent verification and correction. This segmentation enables the system to maintain high error correction accuracy by processing smaller subsets of cells with dedicated verification circuits, rather than attempting to verify the entire vast array simultaneously.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient feedforward and recurrent operations in artificial neural networks using non-volatile memory cells, effectively adjusting and correcting data bits across multiple memory cells, enhancing data verification accuracy and storage capacity in non-volatile memory devices.

Implementation Method 1

Different threshold voltages of the memory cells in the non-volatile memory device provide corresponding weight or transconductance values so as to make the memory cells can be operated as the operation of neural synapses

Methodology Applied
Scientific EffectThreshold voltage: Electric Field

Implementation Method 2

making memory cells having different threshold voltages to output different currents by a applying different read (or input) voltages to the memory cells is an operation resemblance with respect to the operation of neural synapses

Methodology Applied
Scientific EffectThreshold voltage modulation: Electric Field

Data Source

PatentUS10672464B2Method of performing feedforward and recurrent operations in an artificial neural network using nonvolatile memory cells
Publication Date: 2020.06.02 CHUNG YUAN CHRISTIAN UNIVERSITY
  • US10672464B2 patent drawing
  • US10672464B2 patent drawing
  • US10672464B2 patent drawing

AI summary

A method for achieving a feedforward operation and/or a recurrent operation in an artificial neural network having a self-training learning function. The forgoing artificial neural network (ANN) comprises M×N numbers nonvolatile memory cells that are arranged to form a memory array, and the nonvolatile memory cell can be a non-overlapped implementation (NOI) MOSFET, a RRAM element, a PCM element, a MRAM element, or a SONOS element. By applying this novel method to the ANN, it is able to perform the feedforward and recurrent operations in the M×N numbers of nonvolatile memory cells storing with different bit weights that are formed by injected electrons through the self-training learning function of the ANN.