Nonvolatile Memory Fabrication Using Point Cusp Magnetron PVD
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Solution Overview
Problem
There is a demand for increasing the operating speed and integration level of nonvolatile memory devices to meet the need for processing high-capacity data in compact semiconductor products, which existing technologies using resistance materials have not adequately addressed.
Innovation Solution
A method of fabricating a nonvolatile memory device by forming a magnetic tunnel junction (MTJ) on a three-dimensional pillar-shaped lower electrode using point cusp magnetron-physical vapor deposition (PCM-PVD), which involves forming a transistor with an impurity region, a first interlayer insulation layer with protrusions, and an information storage unit connected to the impurity region using PCM-PVD.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing resistance material technologies are used, then nonvolatile memory devices can be fabricated, but the operating speed and integration level are insufficient for processing high-capacity data in compact semiconductor products
Solution Approach 1:
The patent changes the fundamental parameter of the storage mechanism from charge-based (DRAM) or charge-trap-based (Flash) to resistance-based using magnetic tunnel junctions. This parameter change enables faster operating speeds while maintaining nonvolatile storage capability, directly addressing the contradiction between operating speed and data storage reliability.
Solution Approach 2:
The patent employs composite material structures including magnetic tunnel junctions composed of multiple thin films with different magnetic properties (ferromagnetic layers, antiferromagnetic layers, tunnel barrier layers). These composite structures enable both high-speed operation and reliable data storage by combining the advantages of different materials.
2Productivity
If existing resistance material technologies are used, then nonvolatile memory devices can be fabricated, but the integration level is insufficient for compact semiconductor products
Solution Approach 1:
The patent transitions from planar two-dimensional memory structures to three-dimensional vertical structures. The magnetic tunnel junctions are formed as vertical pillars extending through multiple interlayer insulation layers, enabling higher integration density by utilizing the vertical dimension rather than only horizontal expansion.
Solution Approach 2:
The patent divides the memory structure into segmented functional layers including transistors, interlayer insulation layers with protrusions, and magnetic tunnel junctions. This segmentation allows each component to be optimized independently while maintaining overall integration, reducing fabrication complexity through modular construction.
3Productivity
If magnetic tunnel junctions are formed on three-dimensional pillar structures, then integration level and operating speed are enhanced, but the fabrication process becomes more complex
Solution Approach 1:
The patent performs preliminary actions by forming protrusions in the interlayer insulation layers before forming the magnetic tunnel junctions. These protrusions serve as pre-defined templates that guide the subsequent formation of vertical pillar structures, simplifying the overall fabrication process despite the three-dimensional complexity.
Solution Approach 2:
The protrusions in the interlayer insulation layers act as intermediary structures that mediate between the planar substrate and the three-dimensional magnetic tunnel junctions. These intermediaries facilitate the transition from two-dimensional to three-dimensional fabrication, making the complex vertical structure formation more manageable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration level and operating speed of nonvolatile memory devices by effectively forming a magnetic tunnel junction on a three-dimensional pillar shape, enabling efficient data storage and retrieval.
Implementation Method 1
forming an information storage unit on the protrusion, the information storage unit exposing side surfaces of the protrusion using point cusp magnetron-physical vapor deposition (PCM-PVD)
Data Source
AI summary
A method for fabricating a nonvolatile memory device is provided. The method includes forming a transistor including an impurity region formed in a substrate, forming a first interlayer insulation layer covering the transistor, the first interlayer insulation layer including a protrusion overlapping the impurity region, and forming an information storage unit on the protrusion, the information storage unit exposing side surfaces of the protrusion using point cusp magnetron-physical vapor deposition (PCM-PVD) and electrically connected to the impurity region.