Nonvolatile Memory Device With Permanent Cells For Secure Data Storage
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Solution Overview
Problem
Conventional nonvolatile semiconductor memory devices face challenges in protecting confidential data due to the complexity and size increase of the chip required for encryption and special command circuits, which complicates data security and scalability.
Innovation Solution
A nonvolatile semiconductor memory device with a memory cell array that includes regular memory cells capable of switching between two data storage states and permanent memory cells fixed in a third state, allowing for secure data storage and reading without the need for additional protection circuits, utilizing a three-dimensional structure with variable resistive elements and rectifier elements to manage data states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encryption circuits or special command circuits are added to protect confidential data, then data security is improved, but chip size and device complexity increase
Solution Approach 1:
The memory cell array is divided into a normal data region and a confidential data region. The confidential data region uses permanent memory cells with fixed threshold voltage that can only be read, not rewritten, providing inherent security without additional circuits. This segmentation allows confidential data to be physically isolated and protected through structural design rather than complex control circuits.
Solution Approach 2:
The patent introduces a new dimension of security by creating memory cells with fundamentally different electrical characteristics - permanent memory cells with fixed threshold voltage versus regular memory cells with variable threshold voltage. This dimensional difference in cell structure and operation mode provides security through physical constraints rather than through complex control logic or encryption circuits.
2Reliability
If permanent memory cells are introduced for secure storage, then data protection is improved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the creation of permanent memory cells into the existing memory manufacturing process. By forming permanent memory cells with fixed threshold voltage using the same fabrication steps as regular memory cells (through controlled doping or oxide layer formation during standard processing), the manufacturing complexity is minimized while achieving the desired security function.
Solution Approach 2:
The patent changes the threshold voltage parameter of certain memory cells from variable to fixed during manufacturing. By controlling the doping concentration or oxide layer properties during fabrication, permanent memory cells are created with a fixed threshold voltage that prevents rewriting. This parameter change is achieved through standard manufacturing techniques, maintaining ease of production while providing security.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively protects confidential data without increasing chip size by using a control circuit to manage data states, ensuring secure storage and reading without the need for special command control circuits, thus enhancing data security and scalability.
Implementation Method 1
write of data to a memory cell is performed by applying for a short time to the variable resistive element a certain voltage. As a result, the variable resistive element changes from the high-resistance state to the low-resistance state
Implementation Method 2
the cell array can be configured by overlapping a variable resistive element and a rectifier element such as a diode at intersecting portions of bit lines and word lines
Data Source
AI summary
According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array including regular memory cells and permanent memory cells and a control circuit. The regular memory cells are capable of switching between a first data storage state and a second data storage state. The permanent memory cells are fixed in a third data storage state that is read as the same logic level data as the first storage state. Data is stored in at least one of the regular memory cells and at least one of the permanent memory cells. The control circuit rewrites at least one of the regular memory cells from the second data storage state to the first data storage state at the time of data holding. The control circuit performs a reading operation after rewriting the regular memory cells from the first data storage state to the second data storage state.