Non-Volatile Memory Precharge Control for Write-Retry Stress

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Solution Overview

Problem

Conventional write control methods in non-volatile memory increase transistor voltage stress and reduce the life of the memory due to the application of long write pulses during retry operations, even when writing is not performed.

Innovation Solution

A non-volatile memory system with a write control circuit that includes precharge circuits, reading circuits, and latch circuits to manage power supply and ground signals, reducing voltage stress by precharging before retry operations and optimizing write pulse widths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If write retry processing is performed with a long pulse width to improve reliability, then writing reliability is improved, but transistor voltage stress increases and memory life decreases

Engineering Contradiction:
Improvewriting reliabilityVSAvoidmemory life
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The precharge circuit performs preliminary action by precharging the bit line and source line to a predetermined potential before write retry processing. This preliminary voltage setup ensures that when the write pulse is applied, the transistor does not experience excessive voltage stress, thereby protecting the memory cell while still allowing the retry write operation to succeed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the voltage parameters dynamically by applying different potentials to the bit line and source line based on the write operation status. During write retry, the precharge circuit sets specific voltage levels on the signal lines before the write pulse arrives, optimizing the voltage stress on the transistor while ensuring successful writing.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If write retry processing is performed without precharge to reduce circuit complexity, then device complexity is reduced, but voltage stress on transistors increases

Engineering Contradiction:
Improvecircuit complexityVSAvoidvoltage stress
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The precharge circuit performs preliminary action by precharging the bit line and source line to a predetermined potential before write retry processing. This preliminary voltage setup ensures that when the write pulse is applied, the transistor does not experience excessive voltage stress, thereby protecting the memory cell while still allowing the retry write operation to succeed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The precharge circuit acts as an intermediary between the write control circuit and the memory cell. It mediates the voltage levels on the bit line and source line before the write operation, ensuring that the transistor experiences acceptable voltage stress while still allowing the write retry to function properly.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Object-affected harmful factors

If precharge processing is performed before write retry, then voltage stress on transistors is reduced, but processing time increases

Engineering Contradiction:
Improvevoltage stressVSAvoidprocessing time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The precharge circuit operates periodically - it precharges the signal lines before write operations and then allows them to return to floating state after verification. This periodic charging and discharging rhythm manages voltage stress while minimizing idle time, as the precharge is only activated when needed for write retry operations.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system discards the precharged state after verification is complete and returns the bit line and source line to floating state. This recovery process minimizes the time the precharge circuit remains active, reducing overall processing time while still providing the necessary voltage stress protection during critical write retry operations.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS20250273282A1Non-volatile memory, semiconductor storage device, and non-volatile memory control method
Publication Date: 2025.08.28 SONY SEMICON SOLUTIONS CORP
  • US20250273282A1 patent drawing
  • US20250273282A1 patent drawing
  • US20250273282A1 patent drawing

AI summary

A decrease in life is curbed for a non-volatile memory that performs write processing again when writing fails.A memory cell is inserted between a pair of signal lines. A write control circuit performs write processing of supplying a predetermined power supply voltage to one signal line corresponding to write data among the pair of signal lines, and write retry processing of bringing the pair of signal lines into a floating state in a case where verification data and the write data match, and supplying the power supply voltage to the signal line in a case where the verification data and the write data do not match. The reading circuit performs sense processing of reading data from the memory cell after the write processing and supplying the data as verification data to the write control circuit. A precharge circuit starts precharge processing of supplying an inhibition voltage different from a predetermined reference voltage to the pair of signal lines between the sense processing and the write retry processing.