Non-volatile Memory Predictive Programming for Cycling Degradation
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Solution Overview
Problem
Conventional flash memory devices experience cycling degradation over repeated programming cycles, leading to changes in threshold voltage distribution and reduced endurance, which limits the number of allowable cycles and can cause memory errors.
Innovation Solution
A predictive programming scheme that applies a first programming pulse with fixed parameters and determines a fail count of non-volatile memory cells exceeding a verify level, adjusting subsequent pulse parameters to compensate for cycling degradation, thereby extending the memory device's endurance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional programming pulses with fixed parameters are applied repeatedly, then programming speed is maintained, but cycling degradation occurs leading to threshold voltage distribution shifts and reduced reliability
Solution Approach 1:
The patent applies dynamic programming pulses where pulse parameters (amplitude, width, shape) are adjusted based on the memory cell's current state and degradation level. Instead of using fixed-parameter pulses, the system dynamically adapts pulse characteristics to compensate for cycling degradation, thereby maintaining both programming speed and reliability over extended cycle counts
Solution Approach 2:
The patent changes physical parameters of the programming pulses (amplitude, width, shape) based on measured threshold voltage distributions and degradation indicators. By modifying these parameters adaptively, the system compensates for degradation effects and maintains reliable operation while preserving programming speed
2Reliability
If programming pulse parameters are adjusted to compensate for degradation, then reliability is improved, but programming time increases
Solution Approach 1:
The patent performs preliminary characterization of the memory device to establish degradation models and pulse parameter mappings before actual programming operations. This pre-calibration allows the system to quickly determine appropriate pulse parameters during operation without extensive real-time adjustments, thereby maintaining reliability while minimizing programming time
Solution Approach 2:
The patent implements feedback mechanisms where threshold voltage distributions are measured during or after programming, and pulse parameters are adjusted based on these measurements. This closed-loop control ensures reliability is maintained while avoiding excessive programming time by making only necessary adjustments
3Device complexity
If fixed parameter programming pulses are used, then programming process is simple, but cycling degradation causes threshold voltage distribution shifts reducing endurance
Solution Approach 1:
The patent transitions from static fixed-parameter pulses to dynamic adaptive pulses that change based on degradation state. This dynamic approach extends endurance by compensating for degradation effects while keeping the increased complexity manageable through systematic pulse parameter adjustment schemes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The predictive programming scheme effectively compensates for cycling degradation, increasing the number of program/erase cycles and maintaining reliable memory operation by adjusting pulse parameters based on measured fail counts, reducing errors and extending the memory device's lifespan.
Implementation Method 1
a flash cell is written to or programmed by applying a positive programming voltage to the control gate and a negative programming voltage to the drain, source, and body of the device so that a sufficiently large field develops across the tunnel oxide to induce Fowler-Nordheim tunneling
Data Source
AI summary
A method of operating an integrated circuit includes applying at least one first programming pulse to a plurality of non-volatile memory cells to adjust a level of a storage parameter of each of the non-volatile memory cells, the at least one first programming pulse defined by a plurality of pulse parameters each having a fixed valued, and determining a fail count by measuring the number of non-volatile memory cells of the plurality of non-volatile memory cells having a storage parameter level exceeding a verify level. The method further includes determining a change in an programming behavior of the plurality of non-volatile memory cells based on the fail count, adjusting a value of at least one pulse parameter of at least one second programming pulse defined by the plurality of pulse parameters to a desired value based on the change in programming behavior, and applying the at least one second programming pulse to the plurality non-volatile memory cells.