Nonvolatile Memory Control Circuit Reduces Program Stress
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Solution Overview
Problem
Flash memory devices suffer from limited erase or program endurance due to stress on insulating regions and data retention issues, leading to potential breakdown and loss of stored data over time.
Innovation Solution
A control device for nonvolatile memory devices that reduces program operations by using a program-inhibit bit to prevent further programming of already programmed cells and employs incremental step pulse programming with higher verification voltages to counteract charge leakage, thereby reducing stress on memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program operations are performed frequently to maintain data in flash memory, then data retention is improved, but the insulating region breaks down and the memory cell wears out
Solution Approach 1:
The patent performs a read operation before the program operation to check the current state of the memory cell. This preliminary action identifies cells that are already programmed, allowing the system to avoid unnecessary program operations that would stress the insulating region and reduce memory cell lifetime.
Solution Approach 2:
The patent uses the read data as feedback to control whether a program operation should be performed. By comparing the read data with the intended program data, the system determines if programming is necessary, thereby preventing redundant operations that would degrade the insulating region and extend memory cell lifetime.
2Reliability
If data retention operations are performed to prevent data loss over time, then data retention is improved, but stress is added to the insulating layer
Solution Approach 1:
The patent performs a read operation as a preliminary step before programming to identify cells that already contain the correct data. This prevents unnecessary program operations during data retention cycles, reducing stress on the insulating layer while maintaining data retention.
Solution Approach 2:
The system uses feedback from read operations to determine whether program operations are needed during data retention. By comparing current cell states with desired states, the system only programs cells that actually need updating, minimizing insulating layer stress while ensuring data integrity.
3Manufacturing precision
If program operations are performed to update memory cells, then data accuracy is improved, but the number of program operations increases causing wear
Solution Approach 1:
The patent performs a read operation before programming to check the current data state. This preliminary action enables the system to identify cells that already contain accurate data, avoiding unnecessary program operations and reducing the total program operation count while maintaining data accuracy.
Solution Approach 2:
The system uses feedback from the comparison between read data and intended program data to control program operations. Only cells with data discrepancies are programmed, ensuring data accuracy is maintained while minimizing the number of program operations and reducing wear on memory cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach extends the lifetime of nonvolatile memory devices by minimizing stress on memory cells and improving data retention, reducing the need for frequent program operations and minimizing data loss over time.
Implementation Method 1
The electrical field causes electrons to cross an insulating region of the floating gate to change the selected flash memory cell from an erased state to a programmed state or vice versa.
Implementation Method 2
where a flash memory cell remains programmed for a long period, such as ten years, electrical charges can diffuse away from its floating gate, resulting in lost data.
Data Source
AI summary
A device comprises a nonvolatile memory cell array, a buffer circuit, a program control circuit, and a read control circuit. The nonvolatile memory cell array comprises a plurality of memory cells. The program control circuit stores program data in the buffer circuit. The read control circuit reads data from a selected address of the nonvolatile memory cell array. The program control circuit compares the program data with the read data, and sets a bit of the program data as a program-inhibit bit based on the comparison.