Nonvolatile Memory Programming Method for Multi-Level Cell Speed
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Solution Overview
Problem
Nonvolatile memory devices face challenges with low access speed due to reduced cell current and increased complexity in programming multi-level cells, which results in longer program times and reduced read margins as the number of threshold voltage distributions increases.
Innovation Solution
A method of programming nonvolatile memory devices that involves controlling the application of program pulses and verification operations based on threshold voltage distributions, with program-inhibition techniques to manage current consumption and reduce the number of verification operations, allowing memory cells to reach a program pass state only when the program voltage reaches a certain level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cell programming is used to increase memory capacity, then storage density is improved, but program time increases and process complexity increases
Solution Approach 1:
The patent segments the programming process into multiple stages with different program voltages. Memory cells are programmed in phases: first with a lower program voltage to achieve initial threshold voltage distribution, then with a higher program voltage to achieve the final multi-level threshold voltage states. This segmentation reduces the total programming time compared to using a single high-voltage programming step for all multi-level states.
Solution Approach 2:
The patent applies preliminary programming action by first programming memory cells to intermediate threshold voltage states using a lower program voltage before applying the final high program voltage to achieve the target multi-level states. This preliminary action prepares the memory cells in advance, reducing the complexity and time of the final programming step.
2Quantity of substance
If multi-level cell programming is used to increase memory capacity, then storage density is improved, but process complexity increases
Solution Approach 1:
The patent divides the complex multi-level programming process into manageable segments with distinct voltage levels and verification steps. Each segment programs a subset of threshold voltage distributions, making the overall complex process more controllable and easier to implement than a single undivided programming operation.
Solution Approach 2:
The patent applies partial programming action by programming memory cells to intermediate threshold voltage states that are sufficient for the current programming phase, rather than attempting to achieve all final multi-level states in a single step. This partial action approach simplifies each individual programming operation while achieving the overall multi-level programming goal through multiple phases.
3Productivity
If string structure is used to reduce contact number and cell size, then integration density is improved, but access speed deteriorates
Solution Approach 1:
The patent changes the voltage parameter dynamically during the programming process. By applying different program voltages at different stages and adjusting verification voltages according to the programming phase, the patent optimizes the programming speed for each threshold voltage distribution, thereby improving overall access speed while maintaining the compact string structure.
Data Source
AI summary
A method of programming a nonvolatile memory device includes an initial data setting step of inputting data for program inhibition to a first latch of a page buffer to which memory cells to be programmed with a second threshold voltage distribution are coupled, a first program and verification step of performing program and verification operations, a first data setting step of, when a program pulse is supplied more than N times (where N is a natural number), inputting data for performing a program operation to the first latch of the page buffer to which the memory cells to be programmed with the second threshold voltage distribution are coupled, and a second program and verification step of performing program and verification operations.