Nonvolatile Memory Read Control via Integrated Activation Signal

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Solution Overview

Problem

Nonvolatile memory devices face delays in read operations due to sequential processes required for voltage generation and electrical path control, increasing the time needed to perform read operations.

Innovation Solution

A nonvolatile memory device and method that generate integrated activation signals to simultaneously control voltage and path control signals, allowing for concurrent operation of multiple components in response to a read command signal, thereby reducing the number of processes needed before voltages are generated and electrical paths are activated.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If sequential processes are used for voltage generation and electrical path control, then operational reliability is maintained, but read operation time increases

Engineering Contradiction:
Improveread operation timeVSAvoidcontrol process complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent merges the control of voltage generation and electrical path activation into a single integrated activation signal. When a read command is received, both the voltage control signal and path control signal are generated simultaneously from the same activation signal, causing these operations to occur in parallel rather than sequentially. This reduces read operation time while maintaining operational reliability through unified control logic.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The control circuit prepares and generates both voltage control signals and path control signals simultaneously upon receiving the read command, before the actual read operation begins. This preliminary simultaneous preparation of control signals eliminates waiting time between voltage generation and path activation, directly reducing the overall read operation time.

Inventive Principle:
Principle #10Preliminary action

2Speed

If multiple control signals are generated sequentially, then control precision is maintained, but operational speed decreases

Engineering Contradiction:
Improveoperational speedVSAvoidcontrol signal generation simplicity
Core Design Contradiction:
SpeedVSEase of operation

Solution Approach 1:

Multiple control signals (voltage control signals and path control signals) are merged into a single integrated activation signal generation process. The control circuit uses one unified logic path to generate both types of control signals simultaneously in response to the read command, eliminating the need for separate sequential generation processes and thereby increasing operational speed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated activation signal serves multiple functions simultaneously: it triggers voltage generation, activates electrical paths, and coordinates both operations. This multi-functional approach allows a single control mechanism to manage multiple operations that would traditionally require separate control sequences, simplifying the control process while improving speed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20150287469A1Nonvolatile memory device and merthod of operating the same
Publication Date: 2015.10.08 SK HYNIX INC
  • US20150287469A1 patent drawing
  • US20150287469A1 patent drawing
  • US20150287469A1 patent drawing

AI summary

A nonvolatile memory device includes a control circuit that generates an integrated activation signal based on a read command signal for instructing start of an read operation and a ready/busy signal, and simultaneously generates a voltage control signal and a path control signal in response to the integrated activation signal, a voltage providing circuit that generates voltages used to perform the read operation in response to the voltage control signal, and path control circuits that control electrical path connection to a memory cell array in which the read operation is performed in response to the path control signal.