Nonvolatile Memory Read Speed via Dynamic Threshold Voltage
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Solution Overview
Problem
Current non-volatile memory devices face challenges in efficiently performing multi-bit operations, particularly in NAND flash memories, where the distinction between normal and partial program operations affects read operation speed due to fixed threshold voltage state orders.
Innovation Solution
The non-volatile memory device adapts threshold voltage state orders based on the LSB program number, allowing for differentiated MSB program and read operations, enabling both normal and partial program operations to be conducted at faster speeds by determining the appropriate threshold voltage state order based on the LSB program number stored in flag cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a fixed threshold voltage state order is used for all program operations, then the memory device structure is simple, but the read operation speed cannot be optimized for different programming types
Solution Approach 1:
The patent applies dynamics by making the threshold voltage state order adjustable rather than fixed. The control logic circuit dynamically selects between a first threshold voltage state order for normal program operations and a second threshold voltage state order for partial program operations, allowing the system to adapt to different programming scenarios and optimize read speeds accordingly
Solution Approach 2:
The patent changes the parameter of threshold voltage state order based on the programming type. By storing an LSB program number in flag cells and using this to determine which threshold voltage state order to apply, the system modifies the operational parameters to match the specific programming operation being performed, thereby optimizing performance
2Productivity
If multiple threshold voltage state orders are implemented to optimize read speed, then read operation performance improves, but the control logic becomes more complex
Solution Approach 1:
The patent segments the control logic into distinct functional components: flag cells for storing LSB program numbers, control logic circuits for determining threshold voltage state orders, and row decoders for selecting word lines. This segmentation allows each component to have a specific, manageable function while working together to achieve optimized read operations
Solution Approach 2:
The patent implements feedback by using the LSB program number stored in flag cells to determine which threshold voltage state order to apply during MSB program and read operations. This feedback mechanism ensures that the correct threshold voltage state order is automatically selected based on the programming history, optimizing read speed without requiring complex manual control
Data Source
AI summary
Disclosed is a program method of a non-volatile memory device. The program method includes performing a least significant bit (LSB) program operation, during which an LSB program number is stored, and performing a most significant bit (MSB) program operation in a threshold voltage state order determined according to the LSB program number.