Nonvolatile Memory Look-Ahead Read Voltage Selection
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Solution Overview
Problem
Accurate and rapid reading in Multi-Level Cell (MLC) memories is challenging due to variations in charge levels among neighboring memory cells, which can lead to errors and inefficiencies in data retrieval.
Innovation Solution
The use of different read voltages based on the charge level of a selected neighboring word line, where the selection of the neighboring word line depends on its programming status relative to the target word line, allows for determining the appropriate read voltages for the target word line, thereby improving reading accuracy and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single read voltage is used for all memory cells, then the device complexity is reduced, but the reading accuracy deteriorates due to charge variations in MLC memories
Solution Approach 1:
The patent segments the memory array into multiple blocks, where each block is independently decoded and read using a dedicated read voltage. This allows different read voltages to be applied to different blocks simultaneously, improving reading accuracy for MLC memories with charge variations while managing complexity through parallel processing
Solution Approach 2:
The patent dynamically selects and applies different read voltages to different blocks of memory cells based on their specific charge characteristics. The system adapts the read voltage for each block to compensate for charge variations, thereby improving reading accuracy without requiring a single complex voltage control mechanism for the entire array
2Measurement precision
If multiple read voltages are applied to different blocks, then the reading accuracy is improved, but the control complexity increases
Solution Approach 1:
The memory array is divided into multiple blocks with independent decoders, allowing each block to be controlled independently. This segmentation enables multiple read voltages to be applied to different blocks simultaneously, improving reading accuracy while distributing the control complexity across multiple independent units rather than requiring complex centralized control
Solution Approach 2:
The system performs preliminary determination of the appropriate read voltage for each block before the actual read operation. By pre-selecting the read voltage based on block characteristics and preparing the necessary voltage levels in advance, the system reduces the complexity of real-time voltage control during the read operation
3Productivity
If traditional reading methods are used, then the device operation is simple, but the reading speed is insufficient for MLC memories
Solution Approach 1:
The patent segments the memory array into multiple blocks that can be read in parallel with different read voltages. This parallel processing approach significantly increases reading speed for MLC memories while maintaining reliability by using appropriate voltages for each block's charge characteristics
Solution Approach 2:
The system dynamically adapts read voltages to different blocks during the read operation, enabling faster and more reliable reading of MLC memories. By optimizing the read voltage for each block based on its charge state, the system achieves both high speed and high reliability simultaneously
Data Source
AI summary
An apparatus includes one or more control circuits configured to connect to a plurality of non-volatile memory cells through a plurality of word lines. The one or more control circuits are configured to, for each target word line of a plurality of target word lines to be read, select either a first neighboring word line or a second neighboring word line as a selected neighboring word line according to whether non-volatile memory cells of the first neighboring word line are in an erased condition. The one or more control circuits are further configured to determine a read voltage to read non-volatile memory cells of a corresponding target word line according to an amount of charge in non-volatile memory cells of the selected neighboring word line.