Non-volatile Memory Global Reference Current Compensation
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Solution Overview
Problem
Conventional non-volatile memory devices face challenges in maintaining stable data sensing and transmission during read operations due to parasitic resistances in the read path, leading to reduced operation margin and potential faulty data recognition.
Innovation Solution
A non-volatile memory device employing a global reference current generation circuit that adjusts the reference current based on the position of the accessed unit cell and operation environment, using a relative reference current scheme to maximize the operation margin and prevent faulty operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional fixed reference current is used for read operations, then the circuit design is simple, but the operation margin is reduced due to parasitic resistance variations in the read path
Solution Approach 1:
The reference current is made dynamic by adjusting its magnitude based on the position of the accessed unit cell. The global reference current generation circuit receives a position signal indicating the unit cell location and generates a reference current with magnitude tailored to compensate for the specific parasitic resistance of that read path, thereby maximizing operation margin for each position.
Solution Approach 2:
The reference current parameter (magnitude) is changed according to the unit cell position. By varying the reference current strength based on position-specific parasitic resistance characteristics, the system compensates for resistance variations and maintains adequate operation margin across different read paths.
2Measurement precision
If parasitic resistance in the read path is not compensated, then the circuit operation is simple, but data recognition accuracy deteriorates due to resistance variations
Solution Approach 1:
The compensation is tailored to each specific read path by providing different reference current magnitudes for different unit cell positions. Each position receives a customized reference current that matches its specific parasitic resistance characteristics, enabling precise data sensing for each location in the memory array.
Solution Approach 2:
The system uses position information as feedback to adjust the reference current magnitude. The position signal indicating which unit cell is being accessed feeds back to the global reference current generation circuit, which then generates the appropriate reference current level to compensate for that specific read path's parasitic resistance.
3Reliability
If a global reference current is generated without position consideration, then the circuit operation is simple, but faulty data recognition occurs at certain positions
Solution Approach 1:
The reference current generation is made dynamic and position-dependent. The global reference current generation circuit adjusts the reference current magnitude based on the position signal, ensuring that each unit cell position receives the appropriate compensation for its specific parasitic resistance, thereby preventing faulty data recognition.
Solution Approach 2:
The reference current parameter is changed according to position. By varying the reference current magnitude to match position-specific conditions, the system eliminates the faulty data recognition problems that occur with fixed reference currents, while maintaining a relatively simple global current generation architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability of data read operations by compensating for resistance variations in the read path, ensuring accurate data identification even at low signal intensities and improving overall operation stability.
Implementation Method 1
the non-volatile memory device formed of the magnetic material stores information or data using a magneto resistive effect
Implementation Method 2
it may be implemented with a Giant Magneto Resistive (GMR) element or a Tunneling Magneto Resistance (TMR) element
Implementation Method 3
it may be implemented with a Giant Magneto Resistive (GMR) element or a Tunneling Magneto Resistance (TMR) element
Implementation Method 4
a sense-amplifier configured to compare a current flowing in a memory cell selected for a read operation with a global reference current
Data Source
AI summary
A non-volatile memory and method for controlling the same prevents a faulty operation from being generated in a read operation, resulting in increase in operation reliability. The non-volatile memory device includes a cell array configured to include a plurality of unit cells in which a read or write operation of data is achieved in a unit cell in response to a variation of resistance, a reference cell array configured to include a plurality of reference cells, each of which has the same structure as that of the unit cell, a global reference current generation circuit configured to generate a global reference current corresponding to a position of the reference cell so as to verify data stored in the reference cell array, and a sense-amplifier configured to compare a current flowing in the reference cell array with the global reference current during a write verification operation of the reference cell array, and thus sense data.