Nonvolatile Memory Row Decoder Timing for Multi-Mat Load Control
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Solution Overview
Problem
Flash memory devices operating in multi-mat mode face challenges in reducing the load on word-lines and bit-lines, which affects performance.
Innovation Solution
A nonvolatile memory device with a row decoder that applies different voltage levels and durations to word-lines based on single mat or multi-mat modes, optimizing voltage application times to enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If flash memory devices operate in multi-mat mode to improve performance, then read/write operation speed is improved, but the load on word-lines and bit-lines increases
Solution Approach 1:
The memory device is divided into multiple independent mats (first mat, second mat, etc.), each with its own dedicated word-lines, bit-lines, and cell strings. This segmentation allows parallel operation of multiple mats to improve overall speed while distributing the load across separate line sets, preventing any single line from becoming overloaded.
Solution Approach 2:
The row decoder is designed to universally support both single-mat and multi-mat operation modes. It can selectively activate different sets of word-lines and string selection lines depending on whether one or multiple mats are being accessed, allowing the same hardware infrastructure to handle varying operational demands without requiring separate dedicated circuits for each mode.
2Reliability
If voltage is applied to word-lines for longer duration to improve operation reliability, then operational reliability is improved, but operation time increases
Solution Approach 1:
The row decoder dynamically adjusts the voltage application duration to word-lines based on the operational mode. In multi-mat mode where higher reliability is needed due to increased complexity, the voltage is applied for a first time period. In single-mat mode where simpler operations occur, the voltage is applied for a shorter second time period. This dynamic adjustment optimizes reliability while minimizing unnecessary time delays.
Solution Approach 2:
The system changes the temporal parameter (voltage application duration) of word-line activation based on operational conditions. By modifying this parameter dynamically between different time periods depending on whether single-mat or multi-mat operations are performed, the system adapts voltage timing to match the specific reliability requirements of each operational context.
Data Source
AI summary
A nonvolatile memory device includes a memory cell array and a row decoder. The memory cell array includes a plurality of mats. A first cell string of first mat is connected to a plurality of first word-lines, a first bit-line and a first string selection line. A second cell string of second mat is connected to a plurality of second word-lines, a second bit-line and a second string selection line. Each of the first and second cell strings includes a ground selection transistor, memory cells, and a string selection transistor coupled in series. The row decoder applies a first voltage to a third word-line among the plurality of first and second word-lines for a first period of time in a single mat mode and to apply a second voltage to the third word-line for a second period of time longer than the first period of time in a multi-mat mode.