Non-volatile Memory Segregating Sequential Data During Garbage Collection
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Solution Overview
Problem
Non-volatile semiconductor memory faces inefficiencies in minimizing the number of valid pages relocated during garbage collection, leading to increased write amplification, power consumption, and reduced endurance and performance.
Innovation Solution
Implementing a method to segregate write data into logical block address (LBA) ranges, allowing for the allocation of new blocks and relocation of valid memory segments during garbage collection, thereby reducing the need for page relocations and enabling entire block erasure without data relocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If garbage collection relocates all valid pages from a first block to a second block, then the first block can be erased, but the number of write amplification and power consumption increases
Solution Approach 1:
The patent segments valid pages into two categories: sequential valid pages and non-sequential valid pages. Sequential valid pages are identified by checking if their logical block addresses form a continuous sequence. This segmentation allows differential handling where sequential pages are left in-place while only non-sequential pages are relocated, reducing the total number of page movements and associated power consumption.
Solution Approach 2:
The patent extracts only the necessary subset of valid pages (non-sequential pages) for relocation during garbage collection, rather than moving all valid pages. By identifying and isolating only those pages that need to be moved to enable block erasure, the system minimizes unnecessary data movement and reduces power consumption while still achieving the goal of erasing the first block.
2Productivity
If garbage collection relocates valid pages to enable block erasure, then erased blocks become available, but write amplification increases
Solution Approach 1:
The patent segments valid pages into sequential and non-sequential categories based on their logical block address patterns. By identifying sequential pages that can remain in-place, the system reduces the number of pages requiring relocation, thereby reducing write amplification while still freeing up the first block for erasure and subsequent use.
Solution Approach 2:
The patent applies partial action by relocating only the minimum necessary subset of valid pages (non-sequential pages) rather than all valid pages. This partial relocation is sufficient to enable block erasure and improve block availability, while avoiding the excessive write amplification that would result from moving all valid pages.
3Productivity
If valid pages are relocated during overwrite operations, then new pages can be written, but the number of valid pages to be relocated during garbage collection increases
Solution Approach 1:
The patent performs preliminary identification of sequential valid pages during the garbage collection process itself, using the existing logical block address mapping information. By identifying sequential pages that can remain in-place during the same garbage collection operation, the system reduces the number of pages requiring relocation without requiring additional preliminary operations, thus managing complexity while improving efficiency.
4Loss of energy
If sequential valid pages are identified and left in-place, then fewer pages need relocation, but additional page analysis is required
Solution Approach 1:
The patent utilizes the existing logical block address mapping table that is already maintained for wear leveling and address translation purposes. This pre-existing mapping information is leveraged during garbage collection to identify sequential valid pages, avoiding the need for additional complex analysis while enabling the energy-efficient strategy of leaving sequential pages in-place.
Data Source
AI summary
A non-volatile semiconductor memory is disclosed comprising a memory device including a memory array having a plurality of blocks, each block comprising a plurality of memory segments. A plurality of logical block address (LBA) ranges are defined each identifying a plurality of LBA addresses, wherein at least one block is assigned to each LBA range. A plurality of write commands are received from a host, wherein each write command identifies at least one LBA. Data is written for each write command to the memory device. During a garbage collection operation, a memory segment storing valid write data is identified to be relocated, and the valid write data is relocated to a memory segment in a block of the corresponding LBA range.