Non-volatile Memory Device Using Source Side Injection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional non-volatile memory units require significant voltage differences for programming and non-programming operations, making high-speed operation in SRAM difficult due to increased voltage requirements and thicker gate insulating films, which hinder efficient data transfer and storage.
Innovation Solution
A non-volatile semiconductor memory device with a configuration that includes SRAM memory cells connected to a non-volatile memory unit, utilizing source side injection to program data with reduced voltage requirements by setting the thickness of gate insulating films to 4 nm or less, allowing for efficient charge injection and data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional non-volatile memory units are used with large voltage differences for programming and non-programming operations, then data can be stored in non-volatile memory, but the SRAM gate insulating film thickness must increase and high-speed operation becomes difficult
Solution Approach 1:
The patent changes the voltage parameter by introducing a new non-volatile memory unit that operates with minimal voltage difference between programming and non-programming states. This allows the SRAM to maintain its thin gate insulating film (4 nm or less) and achieve high-speed operation while still providing non-volatile data storage capability through the novel memory cell configuration involving charge storage regions and controlled charge injection.
2Reliability
If conventional non-volatile memory units are used requiring high voltage for programming operations, then data can be programmed into non-volatile memory, but the SRAM gate insulating film thickness must increase reducing device performance
Solution Approach 1:
The patent fundamentally changes the voltage parameter requirements by developing a non-volatile memory unit that does not require high voltage for programming operations. The new memory cell uses a configuration where charge can be stored and retained without requiring voltage differences that would necessitate thick gate insulating films, thereby enabling the SRAM to maintain thin gate insulating films (4 nm or less) while achieving non-volatile data storage.
Solution Approach 2:
The patent introduces charge storage regions as intermediary elements between the SRAM storage nodes and the non-volatile memory unit. These charge storage regions enable data to be transferred and stored without requiring high voltage operations, acting as a mediator that decouples the voltage requirements of traditional non-volatile memory from the SRAM operating parameters.
3Reliability
If conventional non-volatile memory units are used with large voltage differences, then data can be stored non-volatily, but power consumption increases due to higher voltage requirements
Solution Approach 1:
The patent changes the voltage parameter of the non-volatile memory unit to operate with minimal voltage difference between programming and non-programming states. This parameter change directly reduces power consumption while maintaining data retention capability, as power consumption in memory operations is proportional to the voltage difference required for programming versus non-programming operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-speed operation of SRAM with low power supply voltage by reducing voltage requirements and thinning gate insulating films, improving performance and reducing power consumption while maintaining data integrity.
Implementation Method 1
utilizing source side injection to program data with reduced voltage requirements by setting the thickness of gate insulating films to 4 nm or less, allowing for efficient charge injection and data storage
Data Source
AI summary
In a non-volatile semiconductor memory device capable of programming SRAM data in an SRAM into a non-volatile memory unit while implementing a high-speed operation in the SRAM, a voltage required to program the SRAM data into the non-volatile memory unit can be lowered. Thus, the SRAM can be operated at high speed with a low power supply voltage because the thickness of a gate insulating film of each of a first access transistor, a second access transistor, a first load transistor, a second load transistor, a first drive transistor, and a second drive transistor constituting the SRAM connected to the non-volatile memory unit can be set to 4 [nm] or less. Therefore, the SRAM data in the SRAM can be programmed into the non-volatile memory unit while a high-speed operation in the SRAM can be implemented.