Nonvolatile Memory Device With Stacked Gate Line Structure

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Solution Overview

Problem

Current nonvolatile memory devices face challenges in maintaining structural stability and reliability as integration increases, particularly in resistance change memory devices where variable resistance states are used for signal storage, requiring innovative structures to enhance memory cell density and operational efficiency.

Innovation Solution

The nonvolatile memory device incorporates a substrate with gate line structures, gate dielectric layers, channel layers, bit line structures, resistance change structures, and source line structures, arranged in a specific configuration to enable independent voltage control and increased memory cell density, with resistance change structures divided into operation regions for independent memory operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If nonvolatile memory devices increase integration and decrease design rule, then memory capacity increases, but structural stability and reliability of signal storage operations deteriorate

Engineering Contradiction:
Improvememory capacityVSAvoidstructural stability and reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The gate line structure is segmented into multiple gate electrode layer patterns (first, second, third, fourth gate electrode layers) alternately stacked with interlayer insulation layer patterns, creating distinct control regions that can be independently managed to maintain reliability while increasing capacity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar memory structures to three-dimensional stacked structures with gate electrodes arranged in multiple layers along the vertical direction, enabling increased memory capacity without compromising the stability of individual storage elements

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If resistance change memory devices use variable resistance states for signal storage, then memory function is achieved, but memory cell density and operational efficiency are limited

Engineering Contradiction:
Improvememory functionVSAvoidmemory cell density and operational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The resistance change structure is divided into multiple operation regions (first and second operation regions) that can be independently controlled by different gate line structures, enabling parallel memory operations and increased cell density while maintaining the variable resistance state memory function

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate line structures serve multiple functions: controlling voltage to different operation regions, enabling independent memory operations, and providing scalable architecture for increased density, making the resistance change memory device more versatile and efficient

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for increased memory cell density and random access capabilities, improving the operational efficiency and reliability of nonvolatile memory devices by enabling independent control of voltages applied to different structures, thereby enhancing signal storage and retrieval processes.

Implementation Method 1

a resistance change memory device has a memory layer in a memory cell with a variable resistance state between a high resistance state and a low resistance state, and stores the changeable resistance states in a nonvolatile manner

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS11508741B2Nonvolatile memory device having resistance change structure
Publication Date: 2022.11.22 SK HYNIX INC
  • US11508741B2 patent drawing
  • US11508741B2 patent drawing
  • US11508741B2 patent drawing

AI summary

A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, a gate line structure disposed over the substrate, a gate dielectric layer covering one sidewall surface of the gate line structure and disposed over the substrate, a channel layer disposed to cover the gate dielectric layer and disposed over the substrate, a bit line structure and a resistance change structure to contact different portions of the channel layer over the substrate, and a source line structure disposed in the resistance change structure. The gate line structure includes at least one gate electrode layer pattern and interlayer insulation layer pattern that are alternately stacked along a first direction perpendicular to the substrate, and extends in a second direction perpendicular to the first direction.