Non-Volatile Memory Uniform Error Distribution via Voltage Adjustment
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Solution Overview
Problem
Non-volatile memory devices, such as flash memory, face challenges in maintaining uniform bit error rates across different bit positions due to non-uniform error distributions, leading to inefficiencies and reliability issues, particularly with multi-level cells where errors affect bit values differently based on their positions.
Innovation Solution
The implementation of a system that uses multiple programming voltages to configure memory cells to store information based on four or more charge levels, with a controller selecting these voltages to reduce differences in bit error rates across bit positions, and adjusting them based on estimated mean and standard deviation values to achieve uniform error distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cells are used to increase storage capacity, then storage density is improved, but bit error rates become non-uniform across different bit positions
Solution Approach 1:
The patent applies parameter changes by adjusting the programming voltages applied to memory cells during programming operations. Specifically, different programming voltages are used for different bit positions (e.g., first bit position vs. second bit position) to compensate for non-uniform error distributions. This voltage parameter adjustment equalizes the bit error rates across all bit positions while maintaining multi-level cell storage capacity.
2Reliability
If programming voltages are adjusted to reduce bit error rate differences, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements dynamics by making the programming voltage adaptive rather than static. The controller dynamically selects and applies different programming voltages based on the specific bit position being programmed and the desired error rate uniformity. This dynamic voltage adjustment mechanism allows the system to maintain reliability improvements while managing complexity through algorithmic control rather than hardware complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance of non-volatile memory devices by ensuring more uniform error distributions across bit positions, thereby improving data reliability and reducing bottlenecks in flash storage systems.
Implementation Method 1
Memory cells can store data by trapping granulized amounts of charge in, for example, an isolated region of a transistor.
Implementation Method 2
The controller can be configured to use at least one of four or more programming voltages associated with the four or more states, respectively, to affect a charge of a memory cell.
Data Source
AI summary
The present disclosure includes systems and techniques relating to non-volatile memory. A described system, for example, includes a non-volatile memory structure containing a group of memory cells that are programmable based on a group of programming voltages, each of the memory cells being configured to represent two or more bits by a charge level, the two or more bits corresponding to two or more bit positions. The described system includes circuitry configured to monitor read-back data from the non-volatile memory structure, determine estimated mean and standard deviation values of level distributions of the memory cells based on the read-back data, and adjust one or more of the programming voltages based on the estimated mean and standard deviations of the level distribution such that differences among bit error rates of the bit positions are reduced.